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Modern processors consist of billions of transistors and new production technologies often have problems with the yield, at least in the first months, but I guess that even after years there will be faulty chips every now and then.

I know that in large blocks (e.g. the cache) there is the possiblity to just disable parts of it and by that reducing the available amount of memory (so you can at least sell the chip at a lower price instead of throwing it away). But is there something similar for the logic units? I am aware that there are multiple ALUs for dispetching, but is this a thing to just disable one of them if there is a production fault? Or are there even additional spare ALUs? Because for me it is hard to believe that fabs just dispose of every chip where there is a faulty transistor in the logic parts, while disabling a complete ALU would proberly reduce the achievable processing power significantly.

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  • \$\begingroup\$ Just my guess. Price of silicon wafer production is relatively low on big quantities, and you can test it before housing in the case, so you can produce complete chips with relatively low failure rate. >50% of the price is pure marketing. Also I think that many processor variations within the same family are made on the same topology and differ only in some switched off features/cores/caches (as you have written), so manufacturer has the large gap to maintain low production failure rate even with damaged units. But I doubt that they have, let's say, several reserved ALUs for the same core. \$\endgroup\$ – cyclone125 Mar 11 at 9:40
  • \$\begingroup\$ I think the most well-known example of this was the Intel 486SX, which was the same die as the DX with a disabled FPU. But I'd be interested to hear what the modern state of this is. \$\endgroup\$ – pjc50 Mar 11 at 11:50
  • \$\begingroup\$ I strongly doubt it. The amount of logic and design time required to allow for low-level redundancy at the speed of contemporary processors would not be worth it. Block-level (core, fpu, cache) redundancy or just block disabling would be much more than enough to significantly increase yield. And at current processor prices and wafer sizes even a yield of 5% could be profitable. \$\endgroup\$ – Edgar Brown Mar 12 at 4:23
  • \$\begingroup\$ So you think, whenever an ALU is not usable they just disable the core. Yeah, might be a possibility. I hoped someone here would really know. \$\endgroup\$ – jusaca Mar 12 at 7:30
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    \$\begingroup\$ Yes, they do disable the core. It's a practice called "binning". \$\endgroup\$ – Toor Mar 13 at 17:54
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As others have said, it is difficult to see redundant ALU logic within a core.

A core was designed to optimize throughput. Any additional logic for a redundant ALU would impact performance and increased area would slow down the whole core. As technology evolved, the silicon became smaller, making cores faster, but essentially using the same intellectual property. Why have redundant ALU's, when space is available for redundant cores to increase production yields?

In 2011, Intel filed a patent for at least 32 cores with 16 active and 16 spare. The patent states failing cores would have higher temperatures allowing a spare core to be switched in. Essentially, dynamic core allocation as required.

You could have high-power and low-power cores allocated as required by tasks. Or switch out a bad core detected by higher temperature levels. Operate the cores in a checkerboard manner to reduce heat.

Intel Patent: Enhancing Reliability of a Many-Core Processor

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  • \$\begingroup\$ That acutally makes a lot of sense, I did not think about the performance impact, that spare silicon areas inside one core can have. Disabling whole cores seems to be the way to go, as the other answers are also implying. \$\endgroup\$ – jusaca Mar 14 at 7:38
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Not in the logic.

However if there are big memories (SRAM) it is common to use a memory with 'redundancy'. These have special logic which can be programmed to replace a area, often a number of rows or columns.

The failing area is detected during testing and then the redundant memory is programmed to replace the faulty location(s).

However this 'replacement' must be set-up using OTP (One-Time-Programmable) bits or some other memory which holds its value. Thus these memories are only used in chips which have such a 'permanent memory' feature, or such a programming feature must be added as well, with all the costs this incurs.

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  • \$\begingroup\$ Do you think these OTP bits are programmed electronically, like burning a fuse or something, or do the big manufacturers have to go directly on the die with laser trimming? \$\endgroup\$ – jusaca Mar 14 at 7:43
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    \$\begingroup\$ OTP are on-chip fuses which can be programmed electronically (sort of like EEPROM but then permanently) End users can also burn them for serial numbers, Ethernet address, encryption keys etc. \$\endgroup\$ – Oldfart Mar 14 at 13:18
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This is certainly not the case for simple MCUs, or typical single core processors. The cost of having spare blocks would not be worth it, and those processors don't use cutting-edge engraving processes, and don't require huge silicon areas, so the yield is good enough.

However, this is done for some multi-core processors, for which the silicon area is rather large, and that uses finer engraving processes which can lead to higher defect rates. On these processors, entire cores can be disabled (which are rather big logic blocks, containing much more than an ALU) when they are defective. The processor is then sold as a lower-end model.

Source: https://skeptics.stackexchange.com/questions/15704/are-low-spec-computer-parts-just-faulty-high-spec-computer-parts

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I certainly cannot answer your question for sure. It makes no much sense to disable units smaller than 1 core, since it becomes a very fine-grained "feature set" that can be enabled or not, and the Cartesian product of all possible features would make myriad of possible CPU models. There are a lot of CPU models already, making them 10-100 times more will definitely not help!

Another aspect is that the billions of transistors are used (for the most part) in making caches, and for defective transistors there manufacturers definitely sell CPUs with parts of their on-die cache disabled (e.g. see, AMD Thorton vs AMD Barton).

But I can tell you an anecdote which I've heard from a person I trust. A long time ago I was a curious overclocker. In my days, the budget overclockable CPU of choice was the AMD Athlon Thoroughbred:

Athlon Thoroughbred

When mounting custom cooling solutions, one had to be very careful while attaching the heatsink, as it presses directly against the die. If you applied uneven pressure, the dies were notorious for cracking easily at the corners, if you applied force at one corner first.

This person had done exactly the same thing, a significant portion of one corner was gone, but the CPU was miraculously working fine, albeit at much reduced memory performance. The corner contained L2 cache only, so with that part gone, the caching protocol was somehow working around the now very defective die. It was probably reporting cache misses for all queries in that part, so the CPU was reduced to its L1 cache only (or only part of L2), so it was much slower in most tests, yet had virtually the same performance on tight loops.

In the same line of thought, it could be made that if an ALU is defective and is capable of somehow signalling back that it rejected work, the CPU may be capable of falling back on other ALUs. Whether this is being done by CPU manufacturers is unknown (and I doubt it), but the cache example (from 15 years ago) shows that it is definitely doable.

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  • \$\begingroup\$ This is certainly very impressive, and it even seems do be some kind of dynamic process, because the system detected the faulty chip part by itself. When asking the question I had more a detection by a testing system in production line in mind. But this story is definitly interesting ;) \$\endgroup\$ – jusaca Mar 14 at 7:45

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