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in this clamper circuit it's easy for me to determine the output waveform:

enter image description here

This is how I do it:

In the positive half cycle, the diode is forward biased with a drop of 0.7 V, so the positive half output is limited to 0.7 V

In the negative half cycle, the diode is reverse biased, and the capacitor has a voltage of 3.3 V, so the negative half output, by applying Kirchhoff:

-Vout - Vin - Vc = 0 Vout = -Vin - Vc = -4-3.3 = -7.3 V

So the output waveform has a positive peak of 0.7 V and negative peak of -7.3 V

But when he asks me to turn the diode around, like this:

enter image description here

I face problems when I apply Kirchhoff, this is how I do it:

In the first positive half cycle, the diode is reverse biased and the capacitor has a voltage of 3.3 V, applying Kirchhoff:

-Vout + Vin - Vc = 0 Vout = Vin - Vc = 4-3.3 = 0.7 V

In the negative half cycle, the diode is forward biased, so it has a drop of 0.7 V, so the output is limited to -0.7 V

I end up with a positive peak of 0.7 V and a negative peak of - 0.7 V , but this should be wrong, the right answer should be the exact same as the first circuit but with different signs, I don't understand how though, can someone let me know, thank you.

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  • \$\begingroup\$ Why do you think that the capacitor has a fixed voltage across it of 3.3V when the diode is reverse biased? Are you assuming that no current ever flows through the capacitor? In any event, you should mark the assumed polarity of the capacitor voltage so you can do KVL properly? \$\endgroup\$ – Elliot Alderson Mar 12 at 20:28
  • \$\begingroup\$ Doesn't the capacitor discharge very little in the load? \$\endgroup\$ – khaled014z Mar 12 at 20:32
  • \$\begingroup\$ It depends on the values of the capacitor and the resistor, as well as the frequency of the input signal. At lower frequencies the capacitor will have more voltage across it; at high frequencies a capacitor looks almost like a short circuit. \$\endgroup\$ – Elliot Alderson Mar 12 at 21:07
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The cap isn't charged until the negative half cycle, where the charge necessary is pulled in through the diode. (Currently ignoring the RC constant, since you seem to treat it as negligible.) The first half cycle, the output will track the input fairly closely. The second half cycle, it clamps the output to -0.7, and the 4V excursion on the input charges it to -3.3. Thereafter, it will stay clamped with a positive excursion of about 7.3V and a negative of 0.7.

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  • \$\begingroup\$ Are you saying that the curved plate of the capacitor will be positively charged? \$\endgroup\$ – khaled014z Mar 12 at 20:53
  • \$\begingroup\$ Relative to the flat plate, yes. BTW, modern convention AFAIK is to use a capacitor symbol with a curved plate only when the capacitor is polarized. \$\endgroup\$ – Cristobol Polychronopolis Mar 14 at 15:36

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