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For STM32F407, it is recommended by the company that a 4-layer PCB be used to realize impedance matching. However in the Discovery STM32F407, a 2-Layer PCB is used.

Now I am designing a PCB for STM32F407. Is it possible to use a 2-layer PCB? If yes, how can I do it?

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  • \$\begingroup\$ When you go to half the standard thickness, track width to dielectric thickness over ground plate is close to 50 Ohms, otherwise for std thickness it is closer to 2:1 width:gap \$\endgroup\$ – Sunnyskyguy EE75 Mar 13 at 6:24
  • \$\begingroup\$ But in the Discovery STM32F407, 2-Layer PCB is used with standard thickness. \$\endgroup\$ – Rasool Mar 13 at 7:23
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    \$\begingroup\$ What are you making? If you flash an LED only then 2 layers is probably fine, if you're integrating phase array radar you need more layers. As it is we can't really say what you need. \$\endgroup\$ – Colin Mar 13 at 8:55
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    \$\begingroup\$ @Rasool - Please stop adding your signature to your questions. I see that you have done this on several previous questions, but it breaks this site rule. Thanks. \$\endgroup\$ – SamGibson Mar 13 at 9:11
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    \$\begingroup\$ @Rasool - You said: "For STM32F407, it is recommended by the company that a 4-layer PCB be used to realize impedance matching." Please edit your question and add the link to the source of that statement, so that we can read the context around that recommendation. Thanks. \$\endgroup\$ – SamGibson Mar 13 at 9:15
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Well, as always in engineering: It depends.

You will need to ask yourself the following questions:

  • What are my rise times on my signals, do I need the improved decoupling which is provided by the plane capacitance? Could EMI be a problem which might be mitigated through better decoupling?
  • Do I have signals which require a defined impedance?

If you can answer both of these questions with "No", you'll probably also get away with a 2 layer board. In any case, make sure you have a well defined ground plane/pour with short return current paths.

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Summary

It depends on the size of the board. If the propagation delay is less than the 1/2 risetime it won't make much difference for signal ringing but still can make a difference for RF emissions.

If you read the ST documents and follow the 2 layer Gerber examples and have experience doing this before, then go ahead with 2 layer. However, at extra copper costs, 4 Layer gives higher signal integrity at max speed with 1ns risetimes and lower impedance with the same size tracks and gaps but now the gnd plane is 1/2 the height so 1 mm track and gap may drop from 85 to 50 ohms (est.)

Compliance for VDD = 3.3 V, LQFP176, TA =+25 °C, fHCLK = 168 MHz, conforms to IEC 61000-4-2 when all the design rules are followed for capacitance and layout. (level 2 is 1kV ESD)

If you need to learn about EMI immunity, here's a useful ref from TI. Reducing track impedance usually results in better immunity and signal integrity for nanosecond rise times but with 2 layers it is possible to pass or fail but easier to pass and route on 4 layers. It also depends on microcode routines that affect spectrum.

enter image description here

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