I'm developing a PCB in KiCAD which uses the RPM5-3 DC power module from Recom. (Link to datasheet)

I created my schematic symbol and now I'm creating the footprint according to the datasheet specifications.

footprint specification on datasheet

I created the following footprint in KiCAD:

my footprint on kicad

The thing is, I don't have 25 pins on the chip, it has only 9 and several pads are connected to one another. How can I tell KiCAD which pad is connected to which? How can I translate what is shown in the datasheet as "pinning information" to KiCAD?


That is a distinction that you make in the symbol rather than the footprint.

In the symbol editor, you can "stack" pins on top of one another, so that they all connect. I'd stick with the datasheet's naming convention (A1, B1, etc). When you create the stacked pins, make one of them the actual pin type and all of the others "passive" and invisible like this

Creating pins

Then, move the pins so that they all overlap like this


In your schematic, you won't see the grey pins (they are invisible) unless you specifically request them. Then your netlist will connect the pins together for pcbnew.

  • \$\begingroup\$ Hey seth, thanks for the response! Will be giving this a try, thank you very much. \$\endgroup\$ – Tomas Ambrogi Mar 13 '19 at 17:32

My personal preference would be to draw and make visible all pins on the part, both used and unused, so that it is easier to check if and where all pins are connected. It make it so much easier to spot a mistake if all pins are there. that is just a personal preference I have developed by experience.

An alternative is as Seth has suggested, however it will be harder to verify that the part is build correctly.

  • \$\begingroup\$ The reason to stack pins is not really to have a cleaner schematic but to ensure everything gets connected as specified. There are even configurations where you must decide to stack or loose support by ERC. (If a part has multiple output pins that must be connected in parallel then ERC would either complain about a correct connection or ignore an incorrect one. Solution: Stack pins with the invisible ones being pintype passive.) \$\endgroup\$ – Rene Pöschl Mar 16 '19 at 5:56
  • \$\begingroup\$ Part2: Stacking pins moves part of the responsibility to the library maintainers. (If you are your own maintainer then it moves it to a different time instance) Meaning if you do a human review of your schematic you would also need to send detailed information about every library asset (symbols with the pin table and dimensioned drawings of your footprints.) It would however be nice to be able to see information about stacked pins directly in eeschema. (a tooltip for example) \$\endgroup\$ – Rene Pöschl Mar 16 '19 at 6:03

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