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I have two ICs in my circuit. They have different supply voltages, 3.3 and 2.7 volts. The voltages are subject to change as we refine the design. I'm trying to come up with labels for these rails. One common convention I see is to use the voltage, so one becomes 3V3 and the other 2V7, but the voltage per se is irrelevant and may change as the design develops.

Is there a convention that would capture the rail's purpose instead of the voltage? It's common to see VBAT, VREG, VIN, etc., but VU1 looks weird.

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    \$\begingroup\$ You mean VU1 as in voltage of the IC U1? Often, you may also see a combination of the two conventions you mentioned, using $sign$voltage_$purpose, e.g. +3V3_IO, +5V0_USB or -12V_ANALOG \$\endgroup\$ – Manu3l0us Mar 14 at 8:06
  • \$\begingroup\$ No, OP means that there are two or more bus voltages that feed multiple devices each. \$\endgroup\$ – Transistor Mar 14 at 8:11
  • \$\begingroup\$ @Transistor I got this one, but it's unclear to me what he wants to express with the label VU1, which he says it looks weird. \$\endgroup\$ – Manu3l0us Mar 14 at 8:21
  • \$\begingroup\$ Name it after what it's supposed to supply. If it is supplying digital logic then it should have a name like 3V3. It's not a big deal to change the signal name later, if you change the voltage. \$\endgroup\$ – Lundin Mar 14 at 13:27
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    \$\begingroup\$ Adding an underscore after the V may help. V_USB is clearer than VUSB, and even V_U1 would be pretty clear with the underscore though I think naming the chip by function would be better. \$\endgroup\$ – supercat Mar 14 at 15:37
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Naming of things is an important topic. Software people perhaps discuss them more than most, as they have lots of variables and functions to name. Fortunately, you have only a handful.

Names have to meet a number of requirements.

  1. Be meaningful - you shouldn't have to look it up in a cross reference to understand it.

  2. Not cause confusion - not only be unique in scope but also not share too many leading characters with other names

  3. Be easy to use - a 50 character descriptive name takes a long time to read, and is easily mis-typed

  4. Not look weird? I don't think so. Who are you doing this schematic for? It's not to look pretty, it's to be correct. If you have an unusual requirement of several rails, all of about 3v, that you must not get mixed up, then weird looking names might be an asset rather than a liability.

There are conventions, like VCC and 3v3, which are not applicable to your situation. So you need to identify the function of these two rails, in a way that's meaningful to you, won't confuse you, and will tolerate small changes to the voltage later. Are they '3v_and_a_bit' and 'nearly_3v', or '3v_logic' and '3v_memory', or '3v_DSP' and '3v_analogue'. I'd often have rails like '3v3_raw', 3v3_filt1' and '3v3_filt2' when using supply filters to stop parts interfering with each other via the rails.

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  • \$\begingroup\$ I'm software people. I talk a lot about naming things. Like Phil Karlton. \$\endgroup\$ – iter Mar 14 at 17:16
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    \$\begingroup\$ Most but not all important schematics have a NOTES: section where common themes are defined, such as all resistors are 1/4 watt 1% unless otherwise noted. Vcc=+15V, Vee=-15V, etc. Orcad/Allegro has plenty of power and ground symbols, which can be assigned any meaningful value. \$\endgroup\$ – Sparky256 Mar 15 at 1:24
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Refactoring

Although names are important, as Neil_UK writes in his answer, your main issue seems to be this:

the voltage per se is irrelevant and may change as the design develops

Neil_UK makes a reference to software development, and I will make another one: The solution to changing parameters is to refactor. If your rail changes from 3.3 volt to 3.0 volt, just change the name of the net. Since your new rail obviously changed due to a new or replaced component, you already had to make a lot of changes. A global search-and-replace on a net name is minor in comparison.

If you're nice to your future self you will mark this change in a changelog, preferably on the schematic, just as you would if you change the value of a component between revisions. This makes a change even less confusing.

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  • \$\begingroup\$ The problem isn't that the voltage may change. The problem is that we have two separate VDD rails. The refactoring that's coming is that we may end up both parts from the same regulator, or may end up having two separate ones. It's easy to replace the labels on a net. It's a lot more work to tear a single VDD rail into two. \$\endgroup\$ – iter Mar 14 at 17:18

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