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I am trying to learn VIC in Lpc2148. As you can clearly see the arrow in the picture. The nVICFIQIN is given as input to a OR gate and is ORed with FIQSTATUS register the result is then negated and supplied to Arm core as nVICFIQ signal. I am not able to understand why the OR and Negation is done. Can someone explain me please.

Thanks in advance


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