Writing and reading from and to SRAM memory [closed]

im just learning SRAM. I wanted to ask, consider the 4x4 memory cell array below

If i wanted to select a word line or row, would the row decoder be a 4x1 multiplexer where each wordline is connected to a Vdd to enable a read or write operation on the cells?

So maybe 2 bits can select any 4 wordlines.

And for the Column decoder, will it be another 4x1 decoder, where the each bit line will be connected to the multiplexer 4x1 and this multiplexer connected to a line which can be either 1 or 0?

Where does the sensing amplifier come into this and are there any other peripherals?

closed as too broad by Mitu Raj, RoyC, Edgar Brown, Sparky256, BimpelrekkieMar 20 at 8:03

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

• Welcome. You can Google "Sram" and find out all those little details. For us that is too broad of a subject, especially since it is well documented online. Lift up your fingers and do some research of your own, then we can help you with more specific questions. – Sparky256 Mar 15 at 18:31
• I have already done this, where do you think i got the image from – user215658 Mar 15 at 18:40

No, the word lines will be driven by a 2-to-4 decoder, where one and only one of the four outputs is asserted at any given time. Using multiplexers with some of their inputs tied to 1 or 0 is a horribly wasteful way to create a logic function.