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im just learning SRAM. I wanted to ask, consider the 4x4 memory cell array below

If i wanted to select a word line or row, would the row decoder be a 4x1 multiplexer where each wordline is connected to a Vdd to enable a read or write operation on the cells?

So maybe 2 bits can select any 4 wordlines.

And for the Column decoder, will it be another 4x1 decoder, where the each bit line will be connected to the multiplexer 4x1 and this multiplexer connected to a line which can be either 1 or 0?

Where does the sensing amplifier come into this and are there any other peripherals?

enter image description here

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closed as too broad by Mitu Raj, RoyC, Edgar Brown, Sparky256, Bimpelrekkie Mar 20 at 8:03

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

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    \$\begingroup\$ Welcome. You can Google "Sram" and find out all those little details. For us that is too broad of a subject, especially since it is well documented online. Lift up your fingers and do some research of your own, then we can help you with more specific questions. \$\endgroup\$ – Sparky256 Mar 15 at 18:31
  • \$\begingroup\$ I have already done this, where do you think i got the image from \$\endgroup\$ – user215658 Mar 15 at 18:40
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No, the word lines will be driven by a 2-to-4 decoder, where one and only one of the four outputs is asserted at any given time. Using multiplexers with some of their inputs tied to 1 or 0 is a horribly wasteful way to create a logic function.

If you only want one output bit then a 4:1 multiplexer is used to select one of the column lines (or bit lines, as they are usually called).

The sense amplifiers are located near the output multiplexer, typically at the bottom of the array as you have drawn it. They convert the small changes in the two bitline voltages into a valid logic level, and may also provide precharge voltages for the bitlines.

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  • \$\begingroup\$ How does noise affect the sense amplifier? \$\endgroup\$ – user215658 Mar 15 at 18:42
  • \$\begingroup\$ It affects the sense amplifier quite a bit. Designing good RAM circuits is not easy. \$\endgroup\$ – Elliot Alderson Mar 15 at 20:22
  • \$\begingroup\$ How does a sense amplifier work? One bitline and its bitline complement will have the same difference in voltage regardless of whether 1 or 0 is stored. But just the Bitline will be greater of less than its complement depending on whether 1 or 0 is stored. So how does it convert the difference into a logic level? \$\endgroup\$ – user215658 Mar 15 at 21:25
  • \$\begingroup\$ The initial voltage on the bit lines might be precharged to Vdd/2. Activating the word line causes one bit line voltage to go a bit higher and causes the other bit line voltage to go a bit lower. A sense amplifier is a kind of difference amplifier, like a simplified version of an operational amplifier. \$\endgroup\$ – Elliot Alderson Mar 15 at 22:43