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I'm trying to find the simplest way of accomplishing the following task:

Convert 3 different pulse input sequences into one of 3 different output lines

The image below explains the problem graphically.

We have 3 possible input pulse sequences on the input line

  • if pulse pattern 1 is received on the input line then output line 1 should go high (e.g. +5V) (and outputs 2 and 3 would be ground)
  • if pulse pattern 2 is received on the input line then output line 2 should go high (all others ground)
  • if pulse pattern 3 is received on the input line, then output line 3 should go high (all others ground).

Any thoughts / comments on the easiest way to accomplish this task would be greatly appreciated!

For example, I'm not sure if there is a specific Integrated Circuit chip that inherently can do this (e.g. some sort of Decoder)? Or do I need to buy an Arduino microcontroller and write a program that listens for different pulse patters on the input line and then sets one of the output lines high when it detects one of the 3 possible pulse patterns?

Thank you for your help!

UPDATE (More Details) - We can differentiate the 3 different pulse patterns based on the duration of each. Let's say, for instance, that each pulse is 1ms high and 1ms low. So we know that an input pulse sequence is complete when the input line has been low for several milliseconds. Since these pulse patterns won't be coming in too frequently (probably 1 pulse input pattern every couple of minutes). The output line should go high (e.g. +5V) for a few seconds after the incoming pulse sequence is determined.

Converting Pulse Sequence Inputs to Parallel Outputs

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    \$\begingroup\$ You will need to constrain the problem further. How would you distinguish a single pulse from the first pulse in a sequence of pulses? Perhaps Time/duration? If so, how long are the pulses and the intervals between pulses and sequences? Does the output send a pulse or does it remain set? Etc.... \$\endgroup\$ – Edgar Brown Mar 18 at 22:19
  • \$\begingroup\$ Depending upon the answer to the need for additional constraints, you might be able to do it with not much more than a 74HC595 Shift Register and some sort of timer. \$\endgroup\$ – George White Mar 18 at 22:53
  • \$\begingroup\$ I would start by researching serial to parallel signal conversion. \$\endgroup\$ – Luke Gary Mar 18 at 23:06
  • \$\begingroup\$ Thanks so much, @EdgarBrown, I appreciate your reply! I added some more detailed constraints to the problem. Any additional comments or suggestions are greatly appreciated... thanks again! \$\endgroup\$ – John Powers Mar 19 at 4:54
  • \$\begingroup\$ Thanks so much, @GeorgeWhite, I appreciate your reply! I added some more detailed constraints to the problem. Any additional comments or suggestions are greatly appreciated... thanks again! \$\endgroup\$ – John Powers Mar 19 at 4:54
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The input pulse train can be used to advance a two-bit counter made from a dual flip flop. Three gates in a quad three-input NAND IC can be used to generate the three decoded outputs without any other glue logic as long as the FFs have Q and Q bar outputs. Three monostable pulse generators in series, the first triggered by the first pulse in the pulse train, can respectively produce a first delay to cover the max. length of the pulse train, a pulse fed to the third input of the three AND gates to make the output pulse via the third input of the NAND gates, and the third pulse to clear the FFs. If you need it to work right after initial power up, there is also a need to clear the FFs unless they are spec'd to come up in a known state.

An alternate design could use a three-bit shift register. That approach would not need decoding logic as long as the input was appropriately changed from a 1 to a 0. Some shift registers have an integral output enable so no extra logic would be needed outside the shift register IC. If the leading edge of the pulse train triggered the shift, the trailing edge of the input pulse could drop the input to the shift register to a 0. Similar to the reset needed in the case of using a counter, some action after the max length of the three pulse would need to raise the input to the shift register to a 1 to be ready for the next set of pulses. One way to do this would be a three-input NOR gate with the inputs respectively connected to the three outputs and the output connected to the input of the shift register.

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  • \$\begingroup\$ Thank you, @GeorgeWhite, really appreciate your help and detailed answer! \$\endgroup\$ – John Powers Mar 21 at 4:43

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