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What is the difference in function between IOC and EXT Interrupt on a PIC? I am currently using a PIC12F1822, and apart from the extra layer of checking you have to do with IOC (i.e. which pin caused the interrupt) the two are identical.

What is the practical difference if any? When would you use either one or the other?

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Look at this document which states:-

Interrupt-on-change
This feature is similar to the external interrupt facility , except that a port change interrupt will be triggered by any change (not just one type of transition) on any of the pins for which it is enabled. This makes it more flexible (being available on more pins), but also more difficult to deal with correctly.

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This is likely done to simplify the chip's interrupt architecture by having less entries in the interrupt vector table. Interrupt on change can be set to fire when a port register changes and can be useful for something like a keypad matrix where you don't want to write an Interrupt Service Routine (ISR) for every single pin. You can write just one that can check the value of the entire port, which might be what you're really interested in depending on the application.

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The three biggest differences between interrupt-on change and external interrupt pins:

  1. The external interrupt pins allow software to specify whether the interrupt should be triggered by a rising edge or by a falling edge; if e.g. a pin is low and one is interested in falling edges only, an interrupt will not be triggered until the pin rises and subsquently falls. Using interrupt-on-change, one would have to wake up on both events.
  2. The external interrupt pins have individual latching status bits. Even if an input pulse comes and goes before software has a chance to respond to it, software can still find out that it happened and react suitably.
  3. Reading an I/O port which has a pin-change interrupt enabled at precisely the time the input changes may result in the pin-change interrupt not triggering. By contrast, reading the I/O port connected an external interrupt pin has no effect on the interrrupt.

The PIC's external interrupts are more versatile and reliable than the general-purpose pin-change interrupts. I'd suggest using the former when practical.

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Basically, the external interrupt will be triggered on a specific (rising or falling, user defined) edge, while interrupt-on-change will be triggered on any edge (both rising and falling).

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  • \$\begingroup\$ At least for the PIC12F1822 the OP mentioned, IOC can also be configured (user defined) for triggering at rising edge, falling edge or both (section 13). So to me the only difference seems to be, that external interrupt can only be configured to trigger on either of the two edge detections. \$\endgroup\$ – PetPaulsen Oct 4 '12 at 20:20
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The interrupt on change is generally for a half byte of I/O, where the external interrupts are generally for individual bits. As you said already, one thing you need to do in the IOC ISR is to figure out which bit (or bits) changed.

The IOC is also a bit tougher to use, even beyond that. It is imperative to read the port soon before enabling the interrupt, and even more important to READ THE PORT inside the ISR! If you have a slow-changing signal, and think you can set a flag inside the ISR and do your read later, outside the ISR, think again! The read of the port (or any bit on the port, if I recall correctly), resets the latch on the comparator that triggers the interrupt. If you don't clear it inside the ISR, it will immediately retrigger when you exit the ISR. If you remember to do this, it's all good, but if you forget and think you can read the port when you get around to it, you'll get a bit frustrated until you remember to do the read in the ISR.

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