I'm trying to build a Circuit Lab simulation of a stacked power mosfet pulser as described in this paper. The simulation runs for 10 ms. After 5ms, the switch flips and the voltage at 'StageOne' drops accordingly, however, the 'Output' does not drop. I think it's supposed to drop because the capacitor C1 keeps the gate slightly positive relative to the source of M2 which should result in M2 opening, however, I'm not an electronics engineer and
I'm just guessing my intuitions around the operation of the circuit aren't certain. Can anyone please advise as to what I'm doing wrong?