Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It only takes a minute to sign up.
Sign up to join this community
I am trying to build a linear gain voltage controlled amplifier using an N-channel JFET as a voltage variable resistor (see circuit below).
As the circuit is set op now, I would expect Vout to be zero since the negative input of the opamp is grounded.
But what I find instead is that Vout depends linearly on the gate voltage Vgate above some threshold (Vgate = 0.6V).
Why does Vout depend on Vgate for this particular circuit?
simulate this circuit – Schematic created using CircuitLab
JFETs rely on a pn junction to isolate the gate from the source and drain. This means that the gate should always be reverse-biased and certainly shouldn't be forward-biased by more than the junction potential; if you do that, it starts acting like it's just a diode.
That seems to be what's happening here; with zero volts on the source and drain, and 0.6V on the gate, your gate junction is forward-biased and your JFET is allowing current from whatever's driving the gate to flow into the feedback loop, resulting in the circuit not working properly.
On top of that, your circuit would not output zero volts even if you were driving the JFET correctly, as you have positive feedback. Positive feedback destabilizes the amplifier and drives its output further towards the rails. Swap the - and + terminals of your op amp for the behavior you want.
