I have designed a PCB (four layer) having
SIM7600I LTE Module. The Stackup is:
- Signal & Component Layer with Ground Pour
- Internal Ground Power Plane
- Internal Power Power Plane (3V3, 4V and 1V8)
- Signal & Component Bottom Layer with Ground Pour
The datasheet says:
I have followed the datasheet guide and included approx.
700uF capacitors (considering the load transient response of
AP6503 as it can handle the transient with 200mV voltage drop):
I have been using
AP6503 Buck Converter to step down from 5V to 4V. The schematics of power design specially for
LTE module is given below:
And I have placed 700uF capacitors near to Module's Power Pin.
The Power traces from
Buck Converter to LTE Module is on Internal Power Plane (Layer 3).
After assembling the PCB and testing it, I found out it is working perfectly but after few days, I put probe of my oscilloscope to the power pin of LTE module and saw weird undershoot and overshoots. I am not sure the culprit behind it. The spikes are of 1V. I want to resolve this issue in my next iteration but I am not sure who is the culprit. I have been using these capacitors near to power pin of LTE Module.
- 470uF Aluminium Polymer 11mohm 16V X 1
- 100uF Tantalum 100mohm 16V X 2
- 100nF Ceramic Capacitor X 1
- 33pF Ceramic Capacitor X 1
The pictures of the noise on power pins of LTE Module are:
I want help in understanding what I did wrong. I think I have followed the datasheets and took measures to avoid any problem after PCB fabrication. Please help.