I want to interface different boards with FPC/FFC or ribbon cable and I was wondering about the placement of the signals in the cable.
I plan to have a 39 signals FPC with :
- 1 SPI bus (SCK, MOSI, MISO)
- 4 GPIO for SPI Slave Select
- 4 other GPIOs
- 1 JTAG bus (TDO, TDIO, TMS, TCK)
- 17 GND power wires
- 7 +5V power wires
I plan to have that many GND wires in order to isolate signals from each other and in order to provide enough return path. The 7 +5V are here in order to provide enough current through the connector.
I placed a GND between almost every signal.
My question is about whether or not there is any issue with placing +5V power signal between SPI lines for example. Will it provide additional EMI or crostalk protection ? Or will it create more parasistic capacitance ?
PS : Similar question has already been discussed in previous topics and the conclusion is almost always the same : place GND between your digital signals. However I have not found any piece of information concerning other power signals such as +5V.