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I am working on a simple 24-hour clock based on the CD4017. To reset when the clock reaches the 24th hour, two diodes are used to produce an "and" logic when the 2 digit and 4 digit LEDs receive a high output from the CD4017. The output from these diodes are connected to the reset pins of both CD4017 chips.

What I have found happens in practice is that the U-H10 chip resets as expected, but the U-H01 chip does not. I imagine this could be due to a delay in the signal due to differences in trace lengths (maybe 10-20mm) and or placements somehow creating a tiny RC effect. (One has more vias than the other.) I tried adding a small cap, shorting resistors R138 and R6, as well as removing R18 (on an etched PCB, not a breadboard.) I also checked the reset (pin 15) of U-H01 and it does not APPEAR to be shorted to ground.

Has anyone else faced a similar problem? Ideas?

NOTE For those unfamiliar with the CD4017, the reset is high, not low. From the TI datasheet "A high RESET signal clears the counter to its zero count." Therefore a monostable circuit that is waiting for a falling edge voltage to trigger will not work in this application without using an inverter.

24-hour LEDs controlled by two CD4017 chips

traces in PCB design

CD4017 chips real PCB

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You're using a "glitch" to reset your counters. In other words, when the reset pulse starts, it immediately removes the conditions for its own creation, so it's only as wide as the propagation delay through one of the counters.

Clearly, one of those counters is faster than the other, so it resets successfully, while the other does not. This is why this is considered poor design practice, and why synchronous counting was invented — it only works under certain conditions.

The fix is to use the glitch to trigger a monostable timer (e.g., half of a 4098) that will guarantee the minimum reset pulse width for both counters. The reset won't occur until the timer is successfully triggered, by which time, it doesn't matter if the glitch goes away.


I see that you have removed R18's connection to ground, but I don't see any other provision to pull that node high. If that node is just floating, then you're just getting capacitive coupling and/or leakage current through the diodes for your reset pulse, compounding the problem.

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  • \$\begingroup\$ thank you. You are right on many counts. For those unfamiliar with the CD4017, the reset is high, not low. From the TI datasheet "A high RESET signal clears the counter to its zero count." As you can imagine, R18 was removed for trouble shooting to ensure that traces were as designed and the circuit had been implemented as drawn (even if incorrect.) Due to my limited access to parts, I'll likely try using a 555 timer or a couple of 2N2222 transistors. I image this case is where a reset supervisor chip (ADM803) would come in handy. \$\endgroup\$ – Harrito Mar 25 at 21:06
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Turns out the 1N4148 diodes were placeholders and not updated. The design was experimental and was supposed to have a 4.5v zener (Nexperia NZX4V3D,133) which I am not sure would have worked anyways.

In the end, I used a 555 circuit to provide a positive trigger timer circuit to check if the problem really was the propagation delay through one of the counters. (https://www.electroschematics.com/6215/positive-trigger-timer/)

Since that didn't actually solve the problem, I dug further and found the diode specification when checking the reference design this was based on.

Lacking the 4.5v zener, I used a very nice AND circuit with a few 2N2222s I had lying around. It works nicely now. For future reference, I disabled the 555 circuit and the reset works just fine, apparently the propagation delay wasn't the issue after all. I'll leave it in place since it is a better design.

enter image description here

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R18 should go to Vdd, not ground. Otherwise the RESET line will never go high (the diodes can only pull it low).

Edit: Depending on the logic family you are using, there may be enough diode and stray capacitance in the diodes to cause false resets. Assume HC logic you can shunt R18 with about 20pF. And make sure R18 connects to Vdd (+5V).

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    \$\begingroup\$ Obviously, if ONE of the counters is resetting, then something is working. We have to assume that the schematic is wrong in that detail. Note the rework on R18 (lower left corner) in the PCB photo. \$\endgroup\$ – Dave Tweed Mar 25 at 20:00
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    \$\begingroup\$ Capacitive kick through the diodes? \$\endgroup\$ – Transistor Mar 25 at 20:00
  • \$\begingroup\$ @Transistor Could be. Shunt R18 with ~20pF and make sure it's connected to Vdd. Don't add too much capacitance or other problems may crop up. \$\endgroup\$ – Spehro Pefhany Mar 25 at 20:13
  • \$\begingroup\$ Even with the suggested capacitance, this is still not a reliable solution. Now you're counting on the fact that the two counters have exactly the same logic threshold on their reset inputs. \$\endgroup\$ – Dave Tweed Mar 25 at 20:20
  • \$\begingroup\$ @DaveTweed Yes, it's probably not a great solution. Your suggestion of a one-shot is much better. If OP does try the above, they should also reduce the resistance of R18 to 2K or so (HC logic) to give the propogation delay a chance to make up for the any difference in logic thresholds (which would tend to reset the slower one only, and the problem is magnified by the slow rise time vs. fast fall time of the diode AND). We used to do ugly things with diodes and capacitors but a one-shot or at least a Schmitt trigger + RC is much more elegant. \$\endgroup\$ – Spehro Pefhany Mar 25 at 20:25
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For a one-time design you can fix this by increasing the resistor in series with the reset pin of the faster IC , R138 in this case. I would use 10K, leave R6 unchanged. (And use the pull-up resistor others have mentioned.) For a production run you probably have to use a one-shot. Edit: I have realized that this won't work here as you are gating outputs of two counters. This is a probable fix: reset H10 as wired and use the rising edge of the zero output to reset H01. Replace D2 with a resistor, cut trace between counters so pull down resistor is still connected to counter H01, then wire a low value capacitor from the zero output of H10 to the reset input of H01.

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