Logic level translations

Have you ever had any experience with an ADG3304 IC? I've prepared a circuit which allows to translate logic levels in SPI interface.

I want my circuit to be compatible with both 1.8V and 3.3V logic levels. That's why I used a relay for selecting the output voltage. My master device is attached to Y-signed pins and slave is opposite. My problem is that I can't communicate with neither 3.3V nor 1.8V-supplied slaved-devices. The circuit of the voltage selector works good.

What could be a possible issue?

I used a logic analyzer to check periods. The first screen is wrong communication

This one is correct:

I tried 3 another methods: - I added decoupled capacitors near VCCa any VCCy (100 nF) - CS pin has been pulled up to VCC via a 10k resistor - Voltage divider has been created on a MISO line with 2 10k resistors

• SPI mode could be an issue. Hook up a scope to your CS, CLK and SDA pins, and check your timing diagrams in datasheets of the devices you are trying to communicate with. See if they match – Willy Wonka Mar 27 '19 at 11:18
• Absolute maximum ratings state $VCCY \leq VCCA$ Operating on the edge of the abs max ratings is not recommended. First page of datasheet: For proper operation, VCCA must always be less than VCCY. Further, did you use decoupling capacitors? – Huisman Mar 27 '19 at 11:18
• You have left out all the important parts of the circuits. What is the OC_OUT3 signal? Have you read the sections "input driving requirements" and "output load requirements" of the datasheet? – CL. Mar 27 '19 at 11:37
• @Huisman That's strong enough to be an answer. – DKNguyen Mar 27 '19 at 19:13
• @Huisman So you're saying it should be at least working with Vcca = Vccy = 3.3V? Either way, I think it's still valid as an answer since if OP wants it to run at 1.8V and 3.3V, they will need to make corrections anyways. And lack of decoupling caps could easily explain why it's not working when everything is 3.3V – DKNguyen Mar 27 '19 at 22:02