I have to control an high impedance load (> 25 MΩ) with 12 V pulses with maximum 5 ns of width and a repetition rate of 100 MHz. I can generate the pulses with the required shape using an FPGA but I can only reach 2.2 V. I was thinking of using a fast RF NPN bjt such as the NXP BFU530 or the Infineon BFR92P.

I have simulated the circuit in Ltspice and I get the following results: enter image description here enter image description here

How can I reduce the recover time of the switching without further decreasing R2? (i am already almost at the limit of the IC.)

Or do you have an alternative circuit to suggest?


You need to include some inductances in the simulation, along with any load capacitance.

And in the realworld, SPICE voltage VDD sources do not exist. That finite charge source, plus inductances, must be modeled.

Finally, use two schottky diodes in the base.


simulate this circuit – Schematic created using CircuitLab

  • \$\begingroup\$ And if he wants (fast) matched rise and fall times (as I think he does) a push-pull output will very likely be necessary. \$\endgroup\$ – WhatRoughBeast Mar 27 '19 at 16:03

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