In transimpedance (or current-to-voltage) opamp application for DAC, it is reccomended to put at the opamp inputs a capacitor (together with a snubber RC network through the feedback resistor), in order to shunt high-frequency energy to ground and prevent the opamp from going into slew-limiting. Check for example AD797 datasheet, fig 54. Datasheet - https://www.analog.com/media/en/technical-documentation/data-sheets/AD797.pdf

The purpose should be to absorb the HF energy of the DAC's current steps and avoid transient intermodulation (TIM) issues.

What about having, instead, at opamp inputs, a damped RC capacitor in order to prevent the full capacitative load for the DAC, and possible ringing at its output? (In effect I don't know the DAC output current circuitry and stability, hence I cannot simulate the benefits, if any)


simulate this circuit – Schematic created using CircuitLab



There are several goals here

1) have a stable I-V circuit

2) have minimal ringing, even tho a 2,000pF cap is between the OpAmp inputs

3) absorb the DAC's output transients (glitches) over the entire output-current range, as that Rout changes (depends upon the DAC output topology --- cascading)

The proposed circuit has TWO series RC networks, originally across the Rfeedback, and added is a RC across the OpAmp input pins.

Not shown here is the OpAmp's "rout", the IC's output resistance that appears inductive and thus causing ringing in presence of any capacitance whether Cfeedback or Cload.

At high frequencies (during the DAC transient), the gain will be R2/Rdampening, thus you can make that gain be >1 or >>1; the OpAmp has to drive that low impedance, and the OpAmp might not have current output ability; if the OpAmp enters Current Limiting, the distortion will soar.

This circuit will strongly depend on the actual OpAmp used, and how close the TRANSIENT currents approach the internal-trip-point of the current limiting. I'd keep the peak-current-demands at less than 25% of the nominal current limiting, if you really care about distortion.


The OP wonders if the Rdampen is needed? Yes. Having only a capacitor on the Vin- will cause massive phase shifts, and you have an oscillator. How well the simulation captures this risk is questionable, because the very highest of frequencies must be included in the simulator model, INCLUDING VDD inductances and ESD capacitances and the VDD bypass capacitors, because of the heavy currents used by the opamp.

Why include ESD capacitances? because the VDD inductances and the large dI/dT of opamp currents will combine (V = L * dI/dT) to produce large upsets to the onchip silicon power supply voltages. Thus the OpAmp Gnd/Power rails will be bouncing and ringing, at a frequency independent of the opamp peaking-response-feedback bad-BODE ringing. That VDD/GND ringing will couple thru the ESD diodes (3pF??) into the input circuits; 3pF at 1GigaHertz is only 53 ohms; is that a big deal. Depends on the real circuit, the real PCB output.


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