Usage of memory storage signatures to determine if a watch dog timer is what has caused your last reset is a scheme that should be avoided at all costs. That scheme is fraught with problems and does not provide a fool proof scheme.
Here are some key factors to consider here that lead to this being a problematic approach. (There are others as well so analyze carefully).
1) Signatures stored into RAM may or may not be legitimate after a power cycle reset becasue RAM can maintain its content for some period of time after a power cycle.
2) A watch dog reset is likely caused by a spurious error in the hardware electronics some place. How can you be certain that this has not compromised the storage of the signatures?
3) The storage of signatures into FLASH or other non-volatile memory is problematic due to the fact that the watch dog timeout / reset could occur during the time that such signatures are being stored.
It is far superior to setup your system hardware with logic that captures the "reset reason" into special flop-flops or register bits that the software can poll in its startup sequence to determine if the restart was due to a watch dog timeout. If your system processor does not have this built right into the chip then consider substituting another processor that does include this capability. In cases where the watch dog is implemented outside the controller look into adding a simple external circuit that can provide the "reset reason" to the processor through an I/O pin.