Starting from an example circuit, I'd like to simulate and physically realize a D-FF circuit that generates a 50% duty-cycle clock.
Scope of this:
- Clock generator for a test circuit
- Out 0-5v
I don't have particular restrictions on the output clock:
- 45-55% duty cycle it's ok
- Freq. imprecision of 5-10% it's also ok
I'd like to regulate the output frequency between 100kHz and 400kHz and between 10-400Hz , maybe with a switch that adds an additional resistor. For now I've added just a potentiometer to regulate the frequency.
Here's an example circuit simulation on Falstad
This circuit doesn't act correctly. Seems to glitch and frequency regulation is not always correct.
My question is:
Starting from this circuit, is it possible to design a reliable functional oscillator (and how?) Or is it completely wrong?