Both documents define standards for communicating with DAP.

The information seems contradictory.

Slide 4 of this presentation says Debug features of Cortex-M4 are compliant with ARMv7 debug architecrute (CoreSight based) which to me implies that CoreSight is some lower level on which arm debug architecture is build.

But Arm official website makes it look like CoreSight is actually build on top of Arm Debug Interface v6. Because the spec for ADI is included as part of CoreSight overview.

Different page on Arm official website says that CoreSight is based on The debug and trace architectures which to me implies that CoreSight is build on top of ADI.

The CoreSight white paper appears to mention the same things as Arm Debug Interface: DAP, SWJ-DP, etc. Which makes me thing that it is the same specification as Arm Debug Interface, but maybe just renamed, or the draft version.

But Arm Debug Interface v6 seems to imply that these are possibly compatible but different technologies:

Compatibility between CoreSight and ARM debug interfaces:

ADIv6 is compatible with the ARM CoreSight architecture:

• ADIv6 can be used to access and control CoreSight-compatible components.

• The ADIv6 specification does not require debug components to comply with the CoreSight architecture.

After looking at the above sources I just feel more confused :)

Question: How do they relate to each other? Is one of them an expansion of the other?

  • 2
    \$\begingroup\$ Questions here need to be specific and stand alone - ie, clicking on links cannot be a requirement to determine what you are trying to ask. What actual concrete conflicts have you found in those sources of information? What actual problem are you trying to solve? You certainly aren't licensing the core to put in your own silicon... \$\endgroup\$ Commented Apr 2, 2019 at 17:33
  • 1
    \$\begingroup\$ I added more details. I do not have an actual problem to solve, but I am starting development for cortex-M and trying to understand the different pieces that ARM provides and how they relate. \$\endgroup\$
    – user10607
    Commented Apr 2, 2019 at 17:59
  • 1
    \$\begingroup\$ If you only develop firmware then you don't really need to care about all of this, J-Link/Ozone/gdb/Eclipse/whatever takes care of this already. I think you would need to know the details at that level if you were making really performance-critical firmware, or your own debugger, or a new debug probe, or a new chip. The only practical "difference" I've encountered is that the firmware on a Cortex-M0 can't easily discover if a debugger is connected. \$\endgroup\$
    – filo
    Commented Apr 2, 2019 at 19:13
  • \$\begingroup\$ From what I've seen, the CoreSight 20 pin header has 5 more active pins that are used for TRACE (clock + 4 bits). \$\endgroup\$ Commented Apr 2, 2019 at 20:13

1 Answer 1


In simple terms, you can think of ADI as a part of CoreSight.

The CoreSight architecture provides a system-wide solution for real-time debug and collecting trace information.

There are many types of CoreSight components, the most familiar of which is probably AP/DP, the component you use to access debugging resources. ADI provides specifications for the AP/DP components and in particular how to access them.

The ADI implementation is sometimes referred to as DAP.

Now, let's go back to CoreSight and ADI:

1. ADIv6 can be used to access and control CoreSight-compatible components

Yes, ADIv6 itself is part of the CoreSight architecture.

2. The ADIv6 specification does not require debug components to comply with the CoreSight architecture

Yes, you can use this to access other parts of the system.

Considering that you mentioned Cortex-M, I would like to remind you that most Cortex-M architectures use ADIv5, including:

  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-M23
  • Cortex-M33

For ADIv5, they also have several minor version. Please check the corresponding technical reference manual, which indicates the specific version they use.

The Cortex-M55 from 2020 onwards uses ADIv6. Note that ADIv5 and ADIv6 use different DP and AP specifications: the DP is somewhat similar, but the AP is fundamentally different.


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