0
\$\begingroup\$

I'm trying to learn ADC on stm8s105s6. But not getting proper adc result. I shorted VCC to analog pin 3 and expected conversion value near 1023 as stm8 has a 10 bit adc.

#include "stm8s105s6.h"
unsigned int a=0;
main()
{
        CLK_CKDIVR=0x00;

        FLASH_DUKR = 0XAE;
        FLASH_DUKR = 0X56;


     //WAP to read ADC Data.



        ADC_CSR                 =0B00000011;// channel 3, ADC not complete
        ADC_CR1                 =0B00100010;// F/4 , continous converion disable adc
        ADC_CR2                 =0B00000000;// Left Align
        ADC_CR3                 =0B00000000;// Data Buffer Disable
        ADC_TDRH                =0B00000000;// Schmitt Trigger Enabled
        ADC_TDRL                =0B00001000;// Schmitt Trigger Enabled
        ADC_CR1                |=0B00000001;// Enable ADC 

        while(1)
        {
            ADC_CR1|=0B00000001;//Enable ADC
            while((ADC_CSR&0x80)==0x00);//Till EOC is reached.
            ADC_CSR&=0B01111111;//Not Completed

            a=ADC_DRH;
            a=a<<2;
            a=a | ADC_DRL;
            delay_s(1);
        }
}
\$\endgroup\$
  • \$\begingroup\$ Is there a VREF you must bias? \$\endgroup\$ – analogsystemsrf Apr 4 at 4:37
0
\$\begingroup\$

Your shifts look suspect. I think you want right, not left, align, and then

a = (ADC_DRH << 8) | ADC_DRL;

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.