In the article Compact sub nano second pulse generator using avalanche transistors, I read P. 874
Further, we used pads on a doublesided 0.062” FR-4 epoxy glass laminate pc-board for capacitors C6-C8 instead of soldering on 3 ATC capacitors. Since the pc-board dielectric has a low series inductance, this improves the pulse rise time significantly. Previous attempts to use pc-board capacitances for low values of capacitors  have used complex construction techniques such as dielectric wedges to accommodate the avalanche transistors and their bias networks with the pc-board capacitors. However, our design simply lays out the capacitors as pc-board traces (Figure 3) that easily connect to the transistors.
I would like to understand what are these "pads" and how this improve the rise time significantly ?