I am trying to build and understand the following circuit, it is an interface to load programs to a Commodore-64 using a mobile or mp3 player:

C64 Standard Tape Interface

  1. Can you please tell me what is the role of R5? Any reference to where I can read about it would be nice too.

  2. The circuit works fine. Later, I added another not gate just before the output to READ(4), to inverse the output. And it caused the signal to become so weak. I needed to set the volume on the input device to max, to get a useful output. Why? Is that related to not using another resistor in parallel with my added not gate? The reason for the extra not gate I added is that some mobile phones seem to play the file inverted. So the signal should be inverted again. Some apps can do it optionally (like TapDancer, which is an android app to play C64 tape images). I got the idea of adding a jumpered not gate to be used if needed from this article

Edit: It seems that the second question is not related to the parallel resistor, and I need to ask it separately. I posted a new question here

(Circuit source)

  • \$\begingroup\$ They are using it as a linear amplifier, not a digital inverter, R5 is the feedback resistor. You are using it as a normal inverter, that's why you don't have the output you expect. \$\endgroup\$ – awjlogan Apr 5 at 13:01
  • \$\begingroup\$ Why do you want to invert the output? \$\endgroup\$ – HandyHowie Apr 5 at 13:02
  • \$\begingroup\$ @HandyHowie Some mobile phones seem to play the file inverted. So the signal should be inverted again. Some apps can do it optionally (like TapDancer, which is an android app to play C64 tape images). I got the idea of adding a jumpered not gate to be used if needed from this article \$\endgroup\$ – Sohail Apr 5 at 13:14

Let me begin the analysis of the CMOS gate Schmitt trigger circuit by assuming that we have an ideal CMOS gate. For a CMOS gate operating at a power supply voltage of 5V, the acceptable input signal voltages range from 0 volts to 2.5 volts for a “low” logic state and 2.5 volts to 5 volts for a “high” logic state.

The threshold voltage is at 0.5Vdd = 2.5V, therefore, the voltage transfer characteristic for our ideal inverter gates will look like this:

enter image description here

Now let us see how adding two resistors affected the switching threshold.

enter image description here

If the input is at LOW state the output is also at LOW.

But if we slowly increase the input voltage from 0V towards 5V and observed the situation we can see that for \$V_{IN} = 1V\$ due to the voltage divider action form by \$R_1\$ and \$R_2\$ the first gate see only \$V_X = 1V \frac{R_2}{R_1 + R_2}= 0.9V\$ at his input (2.5V is needed to swich the gate state).

So we increase the input voltage further to \$V_{IN} = 2.5V\$, but again the voltage at the input (Vx) is to low \$V_X = 2.5V \frac{R_2}{R_1 + R_2}= 2.27V\$ to change the gate state.

enter image description here

The input voltage needs to be greater than \$V_{TH1} = (\frac{2.5V}{10k\Omega} * 1k\Omega)+ 2.5V = 2.75V\$ to gate to switch his state from LOW to HIGH.

Hence the Threshold Voltage (from LOW to HIGH) is equal to \$2.75V\$

enter image description here

Also, notice that now we have a HIGH state at the output (5V) and \$2.75V\$ at the input and the voltage at the gate input (Vx) is equal to \$2.95V\$.

enter image description here

Hence, a further increase in the input voltage will do not change anything in the circuit.

And this is all possible due to the positive feedback and voltage divider.

Because even if the second gate slowly increases his input voltage from 0 to 5V. Positive feedback via R2 speed up this process.

To see how it is done I "freeze" switching the process.

The input voltage reaches \$2.75V\$ and the first gate "see" \$2.5V\$ at his input (Vx) and the switching process begins, the output voltage of a second gate starts to increase his output voltage from 0V to 5V. And if this output voltage reaches \$1V\$ the \$V_X\$ voltage will increase to \$2.59V\$ and it will further increase as the second gate output voltage increases. The input voltage does not need to increase any further, but the \$V_X\$ voltage will be increased "automatically" via R2 resistor due to the second gate change his state from LOW to HIGH. And this is the positive feedback.

As you can see to change the output voltage from HIGH to LOW the input voltage needs to start decreasing his value:

enter image description here

As you can see the input voltage must drop below 2.25V to change the situation. Therefore the second threshold voltage is equal to \$2.25V\$ (change from HIGH to LOW )

And the voltage transfer characteristic will look like this:

enter image description here

The blue color corresponds to the situation when \$V_{IN}\$ grows from 0V to 5V.

And the red color when \$V_{IN}\$ decreases from 5V to 0V.

And as you can see in the attached picture we have a beautiful hysteresis.

And the width of this hysteresis is equal to

$$ΔV_H = 2.75V - 2.25V = \frac{R_1}{R_2}\cdot ΔV_{OUT} = \frac{1k\Omega}{10k\Omega} 5V = 0.1\cdot 5V = 0.5V$$

  • \$\begingroup\$ Great! Thanks. And what changes if not "assuming that we have an ideal CMOS gate"? \$\endgroup\$ – Sohail Apr 6 at 11:54
  • 1
    \$\begingroup\$ @Sohail The upper and lower threshold voltage will be different than the calculated one with the assumption of an ideal CMOS. But the Width of hysteresis will say unchanged. \$\endgroup\$ – G36 Apr 6 at 17:49

Positive feedback creates hysteresis. The slew rate of the op-amp must have been too slow for the inverter, causing it to momentarily oscillate during transitions. A tiny bit of hysteresis can prevent this. I would consider replacing the 4049 with a part with built-in hysteresis, like a 74AC14 and omit R4 and R5.

  • \$\begingroup\$ Dave beat me to it. \$\endgroup\$ – Mattman944 Apr 5 at 13:29
  • \$\begingroup\$ Thank you, I will try it. I have some 74HC14 ICs now, was there any special reason you suggested 74AC14? \$\endgroup\$ – Sohail Apr 5 at 13:38
  • \$\begingroup\$ AC parts are more modern than HC parts and generally have a higher output driver current. The HC14 might have less drive current than the 4049. If you look them up and they are the same, the HC14 should work. Also note that some of these ancient circuits were fine-tuned and changing anything might cause unforeseen problems. \$\endgroup\$ – Mattman944 Apr 5 at 13:47

R5 provides positive feedback around the pair of inverters, turning them into a Schmitt trigger with hysteresis. It's just one way to convert an analog signal into a "clean" digital signal.

Adding another gate after that should not have materially affected the quality of the signal, unless you had its input shorted to its output.

  • \$\begingroup\$ Isn't the OP suggesting that he added the second inverter (A2), so R5 would have originally been adding negative feedback? \$\endgroup\$ – HandyHowie Apr 5 at 13:20
  • \$\begingroup\$ Maybe I am wrong and he is suggesting that he added another. \$\endgroup\$ – HandyHowie Apr 5 at 13:20
  • \$\begingroup\$ @HandyHowie: That isn't how I'm reading it. The image he's showing us is the original circuit, not including his modifications. Besides, positive feedback makes more sense than negative feedback in this application. \$\endgroup\$ – Dave Tweed Apr 5 at 13:21
  • \$\begingroup\$ I think you are correct, my misunderstanding. \$\endgroup\$ – HandyHowie Apr 5 at 13:22
  • \$\begingroup\$ Yes, the image is the original circuit which works fine. \$\endgroup\$ – Sohail Apr 5 at 13:24

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