How to use different 7-segment for different numbers in FPGA board?

I'm working working with NEXYS4DDR board which has two 4-digit 7 segment displays. Using the proper binary-bcd converter I can display numbers, the problem is... the same number is displayed in all the displays (assuming all are activated), like: 1 1 1 1 1 1 1 1 because I can only control one set of segments (CA, CB, CD, CE, CF, CG) and not one set of segments for each display. How can I separate them? To show, like 1 2 3 4? A SystemVerilog or Verilog solution would be preferred since that's the HDL I'm currently learning.

For reference, the board is: https://reference.digilentinc.com/reference/programmable-logic/nexys-4-ddr/start

• Normally you blink them. The number 8 takes all 7 segments yes? you blink one segment at a time at a rate fast enough that the eye cant see. and notice that there are four ANx signals per display. these are led yes so you float the one you are not using and ground (or drive high) the one you are. if you are getting 1111 now then release the other three ANx signals on that display to float and only one of them should show a 1. then drive the other. Just like you need to blink each segment you need to blink each segment of each number. – old_timer Apr 5 '19 at 21:17
• across the four numbers to display 1234 is what 2+5+5+4, 16 separate segments, so you need to blink those 16 segments individually long enough to be seen (small fraction of a second) but fast enough for the eye not to see, start slow so you can see each blink separately then speed it up until you cannot tell the segments are being blinked individually. – old_timer Apr 5 '19 at 21:19
• If you cant float them you can drive them the other direction. If they are there to ground the led then drive the ones you are not using to blink high. make 3 high one low assuming low turns the led on, then change which one is high and change the Cabcdefg pins. – old_timer Apr 5 '19 at 21:25
• See the Nexys 4 DDR Reference Manual 10.1 Seven-Segment Display, particularly the last four paragraphs and Figure-19 Four digit scanning display controller timing diagram and Figure-18 Common anode circuit node. – user8352 Apr 6 '19 at 18:26