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I have simulated the following circuitry in LTSpice:
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Input Voltage pulse characteristics:
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Questions: 1. What is the reason for the current spikes on the input resistor R2? Do I need to worry about this?

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This is the corresponding current output on R1:
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  1. When driving an nchannel mosfet, my understanding is I need to use a push-pull transistor pair to be able to feed in more current to the mosfet to overcome its gate capacitance. But, in simulation, when I use just an npn transistor, the current output is the same as the push-pull pair. Is my circuit wrong?
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    \$\begingroup\$ Have you considered the charge storage parasitics of the BJTs? \$\endgroup\$ – jonk Apr 7 at 11:49
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    \$\begingroup\$ For (2)both circuits are driving the same unrealistic load. Put 1 or 2 nF across the load (to represent that gate capacitance) and try again. \$\endgroup\$ – Brian Drummond Apr 7 at 12:23
  • \$\begingroup\$ tie your collectors to +- 10 volts, place a 100 ohm Rload to Ground, and make the input be 1MHz sinusoid centered about ground, at 2 volts PP. \$\endgroup\$ – analogsystemsrf Apr 7 at 15:09

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