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From the book named NAND Flash Memory Technologies, we can learn (Page 26):

The erase operation is performed in block units, as shown in Fig. 2.15. The wordlines of selected blocks are grounded and the wordlines of unselected blocks are floating. A high erase pulse (∼ 20 V) is then applied to the p-well and n-well in the memory cell area (Fig. 2.5). In the selected blocks, the erase voltage creates a large (∼20 V) potential difference between the p-well and the control gates. This causes FN tunneling of electrons from the floating gate into the p-well, resulting in a typical cell threshold voltage that shifts negative. Since over-erasure is not a concern in NAND flash, cells are normally erased to −3 V. enter image description here

But the book doesn't seem to explain why the erase operation needs to perform in block units.

In my opinion, it's pretty easy to make the erase operation perform in page units. For instance, just apply a high voltage(such as 20V, or a bit lower than 20V) to all word lines but the first word line. Therefore only the first page will be erased.

But now NAND flash memory is designed to perform the erase operation only in block units. So there must be some mistakes in my idea. What are the mistakes?

I have searched Google and found this similar question Why does NAND erase only at block-level and not page level?. Its answer says erasing only one page needs a much higher voltage and then causes damage to transistors. However, my idea doesn't need a much higher voltage at all.

Thanks in advance.


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