Until a few weeks ago, I had never drawn a circuit diagram in my life, so bear with me. I am currently trying to design (in Logisim) a circuit that acts like a toggle switch, using only basic logic gates and no clock. Basically, I want the LED output to turn on when the SINGLE button is pressed and off when it is pressed again, and I have been experimenting with all manner of SR latch/D latch/other combinations to no avail.

I am trying to do it now by making a D flip-flop from scratch, with the button serving as the "clock" and the final Q' output looping right back around as the D input in the first latch, as shown in the picture:

I've looked over this flip-flop very carefully, and I thought I had the master and slave lined up correctly, with the inverters in the correct places, etc., but according to Logisim, it is not correct and doesn't work. What am I missing here?

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    \$\begingroup\$ There is nothing obviously wrong so the issue may be a tool configuration or a subtle wiring issue. I'd break apart the two latches and test them seperately, if it doesn't work, then break it down more to just the gate etc. One thing to note, you don't strictly need the inverter on the inputs to the AND gates, you already have the complementary signals (Q & Q') available. \$\endgroup\$ – placeholder Oct 9 '12 at 15:31
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    \$\begingroup\$ I don't see a problem with your circuit. Are you sure your tool can simulate such a feedback circuit? I once wrote a simple logic simulator using depth-first propagation, which to my surprise and horror was NOT able to simulate such circuits. \$\endgroup\$ – Wouter van Ooijen Oct 9 '12 at 15:49
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    \$\begingroup\$ To echo what @WoutervanOoijen says, it maybe something as simple as you haven't supplied the power rail to the devices, or the ground. Since the power connections are hidden in the schematic you may have forgotten or assumed that they get hooked up automatically. \$\endgroup\$ – placeholder Oct 9 '12 at 16:36

I duplicated your circuit in Logisim (as an opportunity to do something in Logisim). There's nothing wrong with your circuit. There is something about Logisim I don't understand.

First off, the red lines are not lines in a high state; they are errors. One would expect this sort of error if two outputs were tied together. I did a bunch of breaking the circuit and tying lines high or low, and eventually, all the errors were "flushed out" and reconnecting the circuit normally produced the toggling it was designed to do.

Specifically, break the upper leftmost wire, the one that connects Q' to D, then connect D to a high or low source ("pull resistor" works well here), and toggle it until it's all green. Then, reconnect the feedback, and it will all work. Note that high and low are represented by green and dark green (?).

Pressing "Reset Simulation" will bring all the errors back. My guess is, that somewhere in the logic of the program, it has an "undefined state". These undefined states propagate through the gates to the extent that they don't "sort themselves out" the way real electronics do. Undef AND 0 should result in 0, not Undef. Same goes for 1 OR Undef.

Just in case this has been addressed in a later version, I'll note this Logisim is 2.7.1

Update: I "fixed" the problem (within the scope of this simulator, anyway) by inserting a NOR gate in the feedback path. Then connect a pushbutton to the other input. I replaced the original button with a clock signal (found under "wiring"). Now, pressing the button clears the error. (Resetting the logic brings the error back).

  • \$\begingroup\$ If there's some way to specify initial conditions for a simulation, you should be able to clear the errors without having to edit the circuit during the simulation. It's only natural the simulator doesn't know what state the output is in initially if you don't tell it; and for a toggler, it can't know what state it goes to next without knowing what state it was in previously. \$\endgroup\$ – The Photon Oct 9 '12 at 20:42
  • \$\begingroup\$ But a real life one doesn't have this problem. \$\endgroup\$ – gbarry Oct 9 '12 at 21:04
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    \$\begingroup\$ Because in a real life one, there will be some actual voltage on each node at any given moment. But a simulator doesn't know what that voltage is at t=0 unless you tell it. A simulator can only simulate as much about the real world as you define in your model. \$\endgroup\$ – The Photon Oct 9 '12 at 21:44
  • \$\begingroup\$ Adding this information to your circuit model should be easy. In SPICE, you would use an ".IC" card. In Verilog, you could at an "initial" block. Not knowing Logisim, I can't tell you how to do it in that tool, but I suspect there's a simple way. \$\endgroup\$ – The Photon Oct 9 '12 at 21:48

Based on gbarry's response, it sounds as though LogicSim is using pessimistic "don't know" logic evaluation, meaning that wires are only low if the simulator can tell that, given the stimuli received to date, they should definitely be low; likewise, they're only high if the simulator can tell that they should definitely be high. Such pessimistic logic evaluation often precludes simulation of devices which would probably happen to work satisfactorily in the real world, but it tends to ensure that devices will only behave as desired in simulation if they would in fact work in the real world.

If the circuitry were implemented with real-world logic, the circuit would likely stabilize so the top red wire was either high or low, but its actual level would be arbitrary. Pushing the button should cause the top wire to assume the state opposite the one before the push, but since that initial state cannot be predictably defined as high or low, nor can the state after the push.

In some cases it may be more useful to have a simulator arbitrarily power up in some particular state, than to have it simply indicate an unresolved indeterminate state. A major danger with simulators that do so, however, is that they may lead one to believe that a circuit will work in real life when in fact it will not. By contrast, if a pessimistic simulation indicates that indeterminate states get resolved, they will almost certainly do so in the real world; if it doesn't, such states may or may not get resolved in the real world, but one shouldn't rely upon such behavior unless one has examined timing constraints very carefully.


I sort this problem accidentally.

You just have replace your And Gates with IC 74LS08 along with NOT. Frequency of clock is 0.5 and input first j=0 and k=0 after few seconds your Flip flop will start working.


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