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Here's a SOA graph:

©2010 Fairchild Semiconductor

What I don't fully understand is the notes area at the bottom:

*Notes:

  1. Tc=25°C

  2. Tj=150°C

  3. Single pulse

Every MOSFET datasheet seems to have a similar set of notes, where Tc (case temperature) is 25°C, and Tj (die temperature) is the maximum operating temperature.

However, it seems unrealistic to keep the case at 25°C--how would I determine the safe operating area, for example, a situation where the case temperature is 60°C?

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  • \$\begingroup\$ My understanding is that data is obtained using test setups where they can maintain that temperature. It's not practical to do so in a real system so you have to take it worth a grain of salt. \$\endgroup\$ – DKNguyen Apr 11 at 17:03
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These are transient response curves. A single pulse of the power and duration in the table will cause the junction temperature to momentarily rise 150 - 25 = 125 deg C. If your starting temperature is higher, the allowed power is proportional. "Single" in this context means that enough time must pass before the next pulse to allow the junction to cool back to ambient, probably several minutes.

For steady state thermal calculations, it is usually easier to use the thermal resistance values.

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The thermal time constant of a cubic meter of silicon is 11,400 seconds.

The thermal time constant of a cubic 0.1 meter of silicon is 100X faster, at 114 seconds.

The thermal time constant of a cubic cm of silicon is another 100X faster, at 1.14 seconds.

The thermal time constant of a cubic millimeter of silicon is another 100X faster, at 0.0114 seconds (11.4 milliseconds).

This is beginning to get near the volume of silicon used in a power mos FET, but wrong shape factor. Lets continue on to 100 micron (0.1mm), which is the usual thickness of silicon wafers after backgrinding.

The thermal time constant of a cubic 100 micron of silicon is another 100X faster, at 0.114 ms or 114 microseconds.

But 10 micron distances are interesting, because that is often the sizes of various structures built in the top layer of silicon to allow FET gates to control conductivity.

The thermal time constant of a cubic 10 micron of silicon is another 100X faster, at 1.14 microsecond.

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