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While reading the part about I2C bus of reference manual of STM8L MCUs, I found that there is this register named Clock control register high (I2C_CCRH). Its 6-th bit, referred as "DUTY", can be used to set the duty cycle under fast mode. When it is set to 0, it means that the ratio of t_low (low phase time bus clock) to t_high (high phase time of bus clock) being 2/1. When it is set to 1, it means the ratio being 16/9.

My question is: What is so magical about the ratio 16/9? In other words, how was this number determined in the first place?

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There is nothing magical about it. When using Fast Mode where the I2C clock can be up to 400 kHz maximum speed, the clock needs to be at least 1600 ns low and 900 ns high after adding the signal rise and fall times to get the 2500ns clock period.

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