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I am using a AXI Chip2Chip master (with Aurora) on a MPSoC connected to a Xilinx Virtex UltraScale+ running a AXI Chip2Chip Slave. I have set the Master's to 0x10_0000_0000 with 1G of space, see pic below. My question is what should by addresses be on the slave side to be able to access these from the Master?

Address Map of AXI chip2chp

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