0
\$\begingroup\$

Firstly, I've always wondered how do engineers calculate the right parameters of components (caps, resistors, inductors, ...) in big projects, such as mobile motherboards and etc.

It feels rather complicated and very time consuming, let alone error sensitivity - one mistake and oops.

If it's all about several ICs – all the passive components around it – do they just follow reference sheets of these ICs?

Also, looking to the boards with SMDs, I usually see the components tremendously aligned. Obviously, it's all about space efficiency – let's look at iPhone XR motherboard.

If one zooms in the A12 chip, the long row of components (perhaps capacitors) might be found just above it:

enter image description here

And generally pretty much every component is aligned elegantly with the others, no unused space.

The question is:

How do they do that?

Is the board multilayered to make it possible?

If so, that's odd because no vias can be spotted in here.

Or what other kind of techniques are used to design such complicated boards?

Do they align the components by themselves or is it done by software?

For instance, designing a PCB in Eagle involves a manual component distribution, which is surely possible when the PCB is not complicated, but what about the other ones? I doubt they do it by hand...

Summing up the foregoing:

How to design a PCB this complicated?

\$\endgroup\$

closed as too broad by Elliot Alderson, Leon Heller, Chris Stratton, DoxyLover, filo Apr 14 at 20:26

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

  • 2
    \$\begingroup\$ If you were to remove some of the parts, you'd probably find vias under the parts and in the solder pads. \$\endgroup\$ – JRE Apr 14 at 19:14
  • 1
    \$\begingroup\$ I mean, that’s a super broad question. Generally the components are placed by hand. The tools prevent you from violating the design rules, which you get from the PCB manufacturer. Blind and buried vias are used for high density interconnect (HDI). FEM solvers, like ANSYS SIWave, are used to determine the impedance of the power planes and the amount of decoupling needed. Said FEM tools are also used to suppress the resonances in the power planes. \$\endgroup\$ – user110971 Apr 14 at 19:15
  • \$\begingroup\$ Google HDI (High Density Interconnect), buried vias, and via-in-pad. Expensive but necessary for maximum density. I can (almost) guarantee 100% of the placement and much, if not all, of the layout of traces was done by hand on that board. Some boards like the iPhone X even have two boards soldered together face to face to increase the usable area. Total layers is 20 or so. \$\endgroup\$ – Spehro Pefhany Apr 14 at 20:05
4
\$\begingroup\$

how do engineers calculate the right parameters of components (caps, resistors, inductors, ...) in big projects, such as mobile motherboards and etc.

They don't calculate. They use highly polished reference designs from individual IC manufacturers and only accommodate/integrate them into their particular space constraints. Sometimes with mistakes and violations, that are corrected later.

How do they do that? Is the board multilayered to make it possible?

Yes, this kind of boards have 8-16 and more signal layers.

If so, that's odd because no vias can be spotted in here.

They use "blind" and "buried vias" that are very small and filled during metal plating, and are invisible when covered with solder mask material.

Or what other kind of techniques are used to design such complicated boards?

No special techniques, just high-end CAD software packages.

Do they align the components by themselves or is it done by software?

Part placement is dictated by PCB manufacturer's rules and preferable alignment is defined by "pick-and-place" machines used for automated board assembly.

It feels rather complicated and very time consuming, let alone error sensitivity - one mistake and oops.

Yes it is complicated, but CAD tools have all sorts of DRC (Design Rule Checks), and mistakes still do happen. That's why mass-produced devices have certain engineering discipline to bring the board in several steps, refining the design.

If it's all about several ICs – all the passive components around it – do they just follow reference sheets of these ICs?

Yes, OEM usually integrate several large design blocks following reference designs meticulously. And these parts are usually debugged and supported by design support teams from original IC producers.

\$\endgroup\$

Not the answer you're looking for? Browse other questions tagged or ask your own question.