I have a circuit that uses several comparators to read an analog input signal and control some downstream digital logic. When the device powers up, the logic states fluctuate because the input signal takes time to stabilize. This behavior is undesirable for my application, so I want to eliminate the fluctuation. I've used power-on reset circuits to address startup transients in other projects, but I'm curious if there's a more appropriate method in this particular situation due to the behavior of the input line.

In the capture below, the sensor input signal is held at 0 V for about 7 ms when the power supply comes up. Because the discrete logic is very fast, it almost immediately outputs a logic HIGH due to the configuration of the comparators. Then, when the input stabilizes, the logic returns to a LOW state (which is what I want at power-on). I believe the 7 ms delay is due to a startup routine/delay within the sensor itself, as it occurs even when the sensor is disconnected from the rest of the circuit.

enter image description here

To solve this problem, I considered using a power-on reset generator to delay the downstream logic until the input stabilizes, but none of the chips I'm using have enable or reset pins, so the PoR would have to go on the main Vcc line. I'm not sure if that's good practice or not.

Alternatively, I could go with an analog switch or multiplexer on the input line to hold the logic in a known state, and then switch over to the sensor input after a set time delay using a simple RC circuit on the switch/mux control line.

Or, for an active solution, I could combine the switch/mux with a window comparator that latches when the input signal stabilizes to its nominal value (around 2.5 V) to ensure the logic waits until the input is at a known value. In my application, the sensor is mechanical and should always default to 2.5 V at power-on unless there's some other fault, so the window comparator would be an additional safety/interlock feature, but it's not absolutely necessary... just an interesting idea.

Is a PoR or input switch more appropriate in this situation? Or, is there another solution altogether that I'm not considering?

EDIT: As requested, here is a slightly simplified version of the comparator and logic schematic. (Excuse the unused inputs on the gates, but it was easiest for me to throw this together in LTspice, which uses one-size-fits-all gate symbols.)

enter image description here

  • \$\begingroup\$ The schematic for the comparator(s) and signal conditioning would be helpful. \$\endgroup\$ – Peter Smith Apr 17 '19 at 14:47

A solution for your PoR approach would be to AND it to the logic output. Using a schmitt trigger (74xx7001) could make it reliable enough for a simple RC PoR signal.

Example circuit

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  • \$\begingroup\$ I like your suggestion a lot. I will probably have a few AND gates (and Schmitt inverters) left over in my circuit, so this would effectively make use of the extra inputs, too. Nice! \$\endgroup\$ – higrafey Apr 17 '19 at 17:55

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