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I want to design a 12VDC to 5VDC converter using a NCP3020A. As my application has nothing special, I should follow the topology of the Typical Application circuit, and reapply the formulas in the datasheet to my own input and output values and size my components accordingly.

My problem is that values returned by formulas do not match, by far, the size of the components in the Typical Application in page 22 of the same datasheet:

As described in page 12 of the datasheet, the NCP3020A limits the current by comparing:

  • The voltage drop between drain and source of the high side transistor, Vds, measured between inputs VCC and VSW, sampled at 3/4 of the high cycle.
  • With the voltage Vset, obtained by emitting a 13µA through LSDR output and R1 resistor, sampled during startup phase.

schematic

simulate this circuit – Schematic created using CircuitLab

So, assuming that:

  • NCP3020A uses a fixed PWM frequency of 300kHz.
  • The output capacitor C1 is big enough so Vout doesn't change significantly within one PWM cycle
  • Vout is stable at the intended output value of 3.3V
  • Vin is stable at 15V (the middle point between 9V and 18V)
  • The average current traversing the inductance, Iave is stable at Iave(max)=10A, which is the maximum desired output current.

Then, the duty cycle should be close to ideal:

$$d = \frac{V_{out}}{V_{in}} $$

As the NCP3020A has a PWM frequency of 300kHz, the high cycle has a duration of:

$$t_h = \frac{V_{out}}{V_{in}} \cdot \frac{1}{F_{sw}}$$

The instant current Iout at the middle of the high cycle is equal to the average current Iave, but the sampling to limit the current happens at 3/4 of the high cycle, so 1/4 of cycle later. As the current rises linearly and proportionally to the difference of potential in the inductor, the current at that instant is:

$$I_{out(3/4)} = I_{ave} + \cdot \frac{1}{4} \cdot \frac{V_{out} - V_{in}}{L} \cdot \frac{V_{out}}{V_{in}} \cdot \frac{1}{F_{sw}}$$

Which is the exact same expression as in page 13 of the datasheet: So far so good. Let's call the current increase during the 3rd quarter of the high cycle ∆Iout:

$$\Delta I_{out} = \cdot \frac{1}{4} \cdot \frac{V_{out} - V_{in}}{L} \cdot \frac{V_{out}}{V_{in}} \cdot \frac{1}{F_{sw}} $$

To limit current, the NCP3020A compares:

$$ \left( I_{ave(max)} + \Delta I_{out} \right) \cdot R_{ds(on)} < R_{set} \cdot I_{set} $$

  • In the Typical Application circuit, Q1 is a NTMFS4841N, which has a Rds(on)=7mΩ, L=3.3µH. In this condition, ∆Iout=0.65A. According to the formula, to limit current to 10A, I need: Rset = 5.7kΩ
  • But the Typical Application circuit uses a Rset= 22kΩ.

I would love to be wrong, but I don't see where is my mistake.

Regards, JM

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