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In high current boost converter (6-14A input, 5A output), how to determine optimal switching time for the MOSFET gate, to get balance between power loss and switching noise?

I mean the time MOSFET changes the state. I have already designed and assembled PCB. It works on 400kHz. Now I can change MOSFET driver resistors and tune up the switching time. But I do not know what is acceptable.

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  • \$\begingroup\$ How high is high? \$\endgroup\$ – The Photon Apr 22 at 13:42
  • \$\begingroup\$ What criteria do you use to determine the best "balance between power loss and switching noise" \$\endgroup\$ – scorpdaddy Apr 22 at 13:42
  • \$\begingroup\$ @ThePhoton added the info \$\endgroup\$ – Roman Simonyan Apr 22 at 13:44
  • \$\begingroup\$ First determine what amount of switching noise is tolerable, then switch as fast as you can without going over it. Add some more filtering if you want to go even faster. \$\endgroup\$ – Hearth Apr 22 at 13:45
  • \$\begingroup\$ @scorpdaddy as I understand, faster the switching, lower the switching loss, but if you switch very fast, EMI starts ocurring. I need some guidelines to start with. \$\endgroup\$ – Roman Simonyan Apr 22 at 13:46
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It isn't clear whether you mean switcher frequency or switch delay.

In switching converters, each time you switch the gate, and as the MOSFET transitions from being either open or shorted to the opposite state, it briefly becomes resistive. In this state, the MOSFET consumes power. Additionally, for each state transition, the gate driver must pump current into or out of the gate capacitance further eroding efficiency. So in general, for the most efficient conversion, you want a lower frequency of operation.

To minimize losses during the resistive phase, the gate driver should have a low output impedance and be able to charge the gate capacitance rapidly. But as you correctly point out, a high slew rate to charge and discharge the gate capacitance can lead to higher EMI. Layout is critical to minimize radiation.

In general, the switch frequency is chosen as a tradeoff between highest efficiency (lower frequency) and the size of the inductor (higher frequency == smaller inductor). Higher frequency switchers may be easier to filter and should allow smaller capacitive filter elements to achieve the same level of noise and ripple.

You would typically choose the boost controller, MOSFET, inductor and switch frequency based on a combination of the physical size constraints and the desired efficiency. The data sheet should provide enough information to help you make a balanced choice..

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    \$\begingroup\$ I meant the time MOSFET changes the state. I have already designed and assembled PCB. It works on 400kHz. Now I can change MOSFET driver resistors and tune up the switching time. But I do not know what is acceptable. \$\endgroup\$ – Roman Simonyan Apr 22 at 14:28
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    \$\begingroup\$ Ahhh... You're (rightly) concerned about voltage noise and radiated emissions. Your application will determine the allowable level of voltage noise and your government will mandate the allowable level of EMI. Both matter of course. The level of efficiency might not be increased substantially in the tuning of the gate circuit. Generally the switching frequency and the switching architecture (free-wheel diode vs MOSFET) have the greatest effect. Follow the data sheet guidelines and be conservative. \$\endgroup\$ – Randy Nuss Apr 22 at 14:45

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