# Signed representation of negative numbers in Verilog HDL by Samir Palnitkar

-6'd3 // 8-bit negative number stored as 2's complement of 3


Is there a reason as to why a number declared as 6-bit is stored as an 8-bit?

I don't think it is the "sign bits" taking extra bits, as it clearly says 2's complement is used. Even if it is sign bits, then only 1 bit would be required.

• Looks like a simple typo. – Dave Tweed Apr 23 at 11:57
• That was my next quess. Looking through old similar questions , I see the notation <size><u/s><radix><number> for unsigned/signed. But I haven't heard about it yet in my class. Is it obsolete? If not, does using the notation cause numbers to be stored in the respective r's complement. – Yasha Apr 23 at 11:59
• "Is it obsolete" No, that is still the correct syntax for a 'sized' negative number. I also think it is a typo. – Oldfart Apr 23 at 13:08