In my pcb design I have 2 triangular voltage signals with the following specs:
- Peak voltage = 300V
- Rise and fall time= 7us
- (assume a constant current of 0.5A)
Because of the limited space available, I need to trace these signals on top of each other.
I am trying to get away with a 2 layer PCB board with a standard thickness of 1.6 mm.
I am concerned about the crosstalk between the 2 traces due to capacitive coupling.
My attempt at an estimation:
- C= (eo.er.L.w)/d
- L=50 mm
- w=0.6 mm (trace thikness)
- er=4 (dielectric constant PCB)
Thus with these values I arrive at c=0.7 pF
Then with Ic= C*dv/dt= the induced current is 50 uA. This seems a very low current which would bring me to the conclusion that I can neglect this coupling.
But intuitively, I feel that I am missing something.
Or is the analysis good enough?
EDIT: (based on the answer by @Neil_uk) The two traces are going to 2 their loads which are capacitors. Hence the current is constant for linear slope. Thus I made the assumption that the inductive coupling could be neglected.