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Premise

Ceramic capacitors with Class 2 dielectrics (such as X5R and X7R) usually show a reduction of its capacitance value as the applied bias voltage increases. This behavior is more prominent in higher density capacitors that feature high values in small packages.

How to deal with this behavior has been incidentally discussed in some questions on how to choose the Voltage Rating of the part. Of course, reading the datasheet and asking the manufacturer is the ultimate solution. However, I think the common rule of thumb "derate ceramic capacitors by 50%" is misleading and does not help for this behavior.

Analysis

Here is what I've found by playing with the tools from Murata and KEMET manufacturers and in some application notes/posts:

  • The most common behavior is that the Voltage Rating does not affect the Capacitance Change curve at all. In other words, a ceramic 100nF 0603 loses the same percentage of its value at 10V (e.g. 30%) regardless of being rated for 25V, 50V or 100V. See this Maxim application note. Capacitance change not affected by voltage rating
  • In other cases, increasing the Voltage Rating reduces the percentage loss (see this question). Voltage Rating reduces relative capacitance loss
  • In some rare cases, I have found 100V capacitors losing more than lower rated equivalents.

Discussion and questions

Back to the "derating rule of thumb", choosing a "Voltage Rating (DC)" about twice the value of the maximum expected operating voltage is a good guideline to reduce part failure, but generally does not seem to help with the capacitor not holding to its nominal value.

Of course, when the capacitance value is critical, careful analysis of the datasheet is the way to go.

  • How do you approach this kind of design choice? Senior designers will have their own rule of thumb based on their experience: I'm interested in those!

What about less critical components such as the very common 100nF (decoupling) and 10uF (bulk) capacitors? If the package is small, they could be well below their nominal value.

  • Do you care?
  • Do you select a higher value capacitor (with the same package and possibly a lower voltage rating) that will lose more in percentage but will end up with a higher capacitance value?
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When design margin in cheap, put in a lot. If there was one thing I always tried to teach junior engineers, this was it. Voltage margin on ceramics usually doesn't cost much. I never did it to reduce capacitance variations due to bias voltage.

Now, I worked in aerospace, cheap has a much different meaning in the consumer market.

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