I have drawn below an NMOS logic inverter and its equivalent circuit for HIGH state:

enter image description here

  1. Why is this gate said to have high output impedance at HIGH state? Is that because of the open switch or because of the resistor R’s value?

  2. Why having high output impedance lowers noise immunity? Is there a relation between output impedance of a source like this gate and interference picked up? Im trying to make sense why high output impedance lowers the noise immunity.

  • \$\begingroup\$ 1 - because of a pull-up resistor. And high output impedance is bad because you cannot drive a load that demands "a lot" of currents. 2 - the pull-up resistor together with the load resistance form a voltage divider. And this lowers the Voh value so that Voh is closer to Vih_min. \$\endgroup\$
    – G36
    May 5, 2019 at 16:32
  • \$\begingroup\$ 1- The mos has high impedance because is interdicted. The output impedance is given by the R. 2- Considering only thermal noise, his power is proportional to the value of R. The more R the more the noise \$\endgroup\$
    – Simus994
    May 5, 2019 at 16:32
  • \$\begingroup\$ How about if there is 60Hz electric or magnetic field around; would higher R cause more 60 Hz pickup? \$\endgroup\$
    – cm64
    May 5, 2019 at 17:04
  • \$\begingroup\$ Yes---- Efields provide displacement current (charge injection). The noise voltage is just OhmsLaw: current * impedance. \$\endgroup\$ May 5, 2019 at 17:14
  • \$\begingroup\$ @analogsystemsrf Does changing electric field induce voltage or current? Maxwell eq says it induces voltage \$\endgroup\$
    – cm64
    May 5, 2019 at 17:17

2 Answers 2


The output impedance is the drain impedance in parallel with the resistor. The drain impedance is very large when the MOSFET is off, so the output impedance is dominated by the resistor. The output resistance can be decreased by decreasing the value of the resistor, but this will result in excessive current through the MOSFET when the inverter output is low.

A large output impedance is noisy for a few reasons. First, the resistor contributes thermal noise. The equation for thermal noise \$\sqrt{4kTRB}\$ where \$R\$ is the value of the resistor, so the larger the resistor the more thermal noise.

Second, if the inverter output is connected to another amplifier, that amplifier's input current noise is multiplied by the source resistance (the inverter's output impedance) to create voltage noise at the input of the second amplifier. The larger the source resistance, the greater the voltage noise at the second amplifier's input.

Thirdly, high impedance nodes are more sensitive to capacitive coupling as seen in this question: Why are high impedance circuits more sensitive to noise?

  • \$\begingroup\$ I see interesting. But how about the noise induced by magnetic field interference when the MOSFET is logic high? See my question here: electronics.stackexchange.com/questions/437213/… If the NMOS inverter output impedance is high it will lower the 60Hz magnetic pickup at the next stage isn't it? Imagine the NMOS inverter output impedance is equal to the input impedance of the next stage the receiver stage will pickup only half of the total induced voltage. But if inverter output were zero it would pickup all the interference. \$\endgroup\$
    – cm64
    May 9, 2019 at 18:01
  • \$\begingroup\$ ...Is that correct or do you agree? \$\endgroup\$
    – cm64
    May 9, 2019 at 18:05

Electric Fields are coupled by capacitance.
Magnetic Fields are coupled by mutual inductance.

Both stray effects have a high impedance which can be shunted by a low impedance pull-up, which may also include a capacitor but that also increases rise time but may be suitable for long lines if you choose a high R such as 10k. The low state impedance for 5V CMOS is ~ 50 Ohms.

Ideally, you want balanced-impedance from source to load to cancel out stray reactive coupling. Shielded twisted pair (STP) helps on the noise ingress part for the cable.

Even AC transmission lines are twisted. You should notice on 3 phase overhead lines that two wires swapped every km. This balances the grid for long wavelengths of magnetosphere wobble currents induced by solar flares. It helps but is not perfect.

  • \$\begingroup\$ AC transmission lines are twisted? Never heard of it. Very interesting. \$\endgroup\$
    – cm64
    May 5, 2019 at 18:04
  • \$\begingroup\$ It is universally done to protect the grid from magnetic fields that become more on one phase than another creating a differential voltage from CM imbalance. \$\endgroup\$ May 5, 2019 at 18:19
  • \$\begingroup\$ Next time along highway, look every 1km for 2 wire phases swapping positions on the tower. AB, then BC then CA and repeating. Now what frequency is that 3km wavelength equivalent to? Only much lower freq, are balanced. Look up Schuman Resonance and Carrington Effect. \$\endgroup\$ May 5, 2019 at 18:38

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