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I'm currently a rising junior in EE and am honestly completely lost... I've been tasked with designing a constant current load circuit to discharge parts of the battery pack for Georgia Tech's solar racing club, but I don't really know where to start. I have basic circuit knowledge, but no real experience.

I've been online and saw how to make the simplest one, where one op amp is connected with a load resistor and therefore can draw current out of whatever I'm discharging, but as for the rest of it, I'm lost. Can anyone explain to me how the complicated constant current load circuits even work? If you could provide an example of one and walk me through it, I'd appreciate it so much.

Thanks.

update: Sorry for not clarifying on so many things, this is my first time asking a question on here. I'm trying to make a constant current load circuit because the team needs a module discharger. The battery pack has 35 modules, so whichever modules discharge too quickly will give us an indication of what parts of the pack have deficiencies in capacity. Each module trips at an under-voltage of 2.5 V and over-volts at 4.2, it usually floats around the upper 3 range though. I'm not too sure about what the mAh capacity for each module is, but I sent a message to my lead asking about it. I do know he wants to discharge each module at 20 Amps using the constant current load circuit though.

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    \$\begingroup\$ Tell us your circuit specifications. Just "I need a constant current sink" is not enough information. \$\endgroup\$ – Bart May 6 at 6:17
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    \$\begingroup\$ Dave Jones is a good startet: m.youtube.com/watch?v=8xX2SVcItOA \$\endgroup\$ – Stefan Wyss May 6 at 6:18
  • \$\begingroup\$ I agree with Bart. Please edit your question to include the following: (1) Battery voltage. (2) Battery capacity in Wh or Ah. (3) The required discharge rate or time. (4) Why do you want to discharge the battery at all? (5) Why do you want to discharge "parts of the battery pack"? See Simple constant current driver for an example of a circuit for low power. This probably isn't suitable for your application. \$\endgroup\$ – Transistor May 6 at 8:24
  • \$\begingroup\$ Also try find inspiration by following some of the links in the image search. - google.com/… \$\endgroup\$ – KalleMP May 6 at 14:37
  • \$\begingroup\$ I wrote an update, sorry for the earlier confusion! I tried to include all the specifications that I know about for sure for the car's battery pack \$\endgroup\$ – Alvin Li May 6 at 18:27
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Designing a constant current load circuit to discharge a battery?

The basic math behind a CC load is well presented here in a TI application note.

enter image description here

In this application a DAC is used to set a precise current value, but of course this could equally be a simple pot across VCC to Ground. The integrator ramps up or down the gate drive to achieve the desired current through Q1 by adjusting the Ohmic value of RDS.

It's difficult to offer much help beyond that above since you don't specify any parameters you need to meet. (hopefully your EE education will eventually make you aware of things like specifications and requirements documents!).

This you need to think about as you scale the above circuit to your needs:

  1. Current range and power to be dissipated by this CC load. For example, discharging a 10AH 12V battery vs a 500AH 12V battery in say an hour could produce power dissipation levels in the 100W to 6kW range.
  2. How do you control starting and stopping (turning off and on) this CC load. Especially at the end of the discharge period, is this to be a purely manual process (jumper cables) or do you have some automation that will run for a fixed time or to a defined voltage endpoint?
  3. Are there to be defined voltage endpoints?
  4. Is the CC load powered by the battery it is discharging or power separately
  5. Does this CC load understand a range of batteries (terminal voltage and chemistry). For example is this for discharging a single LiIon cell or a battery pack made up of many cells?

And lastly....

  1. Do you really want CC or would Constant Power be the best solution. For example, the current to discharge a 12V battery pack compared to a 50-170V battery pack. The battery packs may all be the same cell type and size ….but it would be much better to use constant power in most cases where your load device is limited in dissipative capability.

Now that you have updated your question to include some specifications some advice can be given.

  1. With a load current of 20A and a terminal voltage range of 2.5-4.2V you can make decisions about where to dissipate the energy.

In this case you could elect to dissipate as much energy as possible in a simple resistive load. For example you could use a 0.1 Ohm resistor and regulate the voltage on it to 2V. This would dissipate about 40W. While a power resistor is expensive, it is MUCH cheaper than extruded heatsink for an active device.

  1. You could then choose an active device to dissipate the rest of your maximum required load (4.2V @20A). The maximum dissipation is about (4.2 *20) - 40 = 44W. This is well within the range of a single FET devices with an appropriate heatsink. I showed this device below.

  2. You might also consider that you may want a series diode in the circuit so that you have some polarity protection.

So a partial schematic might look like this:

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ If using a MOSFET as the pass element you need to choose the part very carefully, paying attention to the Safe Operating Area chart in its datasheet. It's not sufficient to pick a MOSFET with a high current rating - most are intended to be operated either fully off or fully on, not in the linear region in between. A BJT may be more suitable (though there certainly are MOSFETs that can work) \$\endgroup\$ – pericynthion May 7 at 4:11
  • \$\begingroup\$ @pericynthion That's a given. The FET I chose is well within SOA rating and maximizing the power dissipated in the series resistor helps reduce the FET power. A BJT is much less optimal because of the high VCE(sat) and the high base current from the driver. FETs are much easier to use in this type of application. \$\endgroup\$ – Jack Creasey May 7 at 15:42
  • \$\begingroup\$ I think it's an important point to mention to newbies - it's often overlooked. I agree the one you've selected works here, though for discharging li batteries it's worth looking at operating points at both ends of the discharge curve. \$\endgroup\$ – pericynthion May 7 at 16:45
  • \$\begingroup\$ @pericynthion What makes you think I didn't look at both ends of the discharge curve? If you have a problem with my post or think it's incorrect ….raise it, don't just dance around waving flags. There are several things I would improve with the circuit, but the OP does not need to know those yet. I think I have showed a potentially successful answer. At least it gets the OP started thinking about the overall design. What I showed was a partial solution …...and I carefully said that in the answer. \$\endgroup\$ – Jack Creasey May 7 at 16:54
  • \$\begingroup\$ I'm not trying to criticize your answer, I think it's a good one and upvoted. Just wanted to add some points. \$\endgroup\$ – pericynthion May 7 at 16:57
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schematic

simulate this circuit – Schematic created using CircuitLab

Here is a sink capable of quite high currents, but beware as the loop compensation is not very simple. Note that this is to show how such a load operates.

If you update the question with specifics then an actual design is possible.

The operation is quite simple:

Vref sets the sink current as Vref / (OA1 gain * R1).

Setting Vref at 1.2V (a very common reference voltage), then I have 1.2 / (10 * 0.12) = 1A

The sense resistor (R1) can be lower in this type of circuit, so we have less power dissipation in the sense resistor than a single amplifier circuit, at the expense of some added complexity.

R4 and C1 set a low pass filter (OA2 is an integrator).

R3 and R2 set the gain of the sense amp and the FET I have chosen is a really low Rds(on) device (5m\$ \Omega\$ at 5V gate drive).

R5 is present to isolate the effects of the FET gate charge on the output of OA2.

R3 may need a small capacitor in parallel to overcome the natural pole at the input to OA1 (due to effective pin capacitance).

The device (in your case a battery) would have it's positive terminal at the Isink node.

I will not go into the mathematical details here (Others can feel free to do that) as I am trying to explain the basics of circuit operation.

Design considerations:

Opamp power: This needs to be high enough to drive the gate high enough to achieve really low Rds(on).

Gain at amplifier 1: Keep it below 20 is my usual rule (due to stability issues).

C1 is usually in the 100s of pF to a few nF for many implementations but it is application specific. This is also high enough to swamp any layout parasitics that will be present. Make sure it is a C0G device.

Amplifier gain bandwidth product; for OA2 it may be necessary to choose a device with a low GBW so that poles in unfortunate locations do not impact stability.

Pass element (FET): Clearly it must have sufficient V(DS) to handle the battery voltage. Rds(on) should be as low as possible and total gate charge should also be as low as possible to minimise capacitive loading on OA2 as it is in a unity gain configuration.

A practical circuit will have more features such as applying Vref or grounding the non-inverting input of OA2 to enable and disable the current sink. Another feature might be a pull down resistor at the gate of M1. There could well be much more depending on just where the circuit happens to be.

I have deliberately not chosen the amplifiers as that is very application specific.

Before attempting to build a real circuit, I strongly suggest running it in a simulator such as LTSpice or another capable analog simulation tool.

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    \$\begingroup\$ The statement about Opamp Power is incorrect. You CANNOT drive the FET RDS(on) to a low value. The whole reason for the circuit is to dissipate the power IN the FET so it will operate in its Ohmic region where RDS is being used to provide a variable resistance. If you were to drive the FET to a low RDS(on) then you'd be dissipating the power in the series resistor ...which you go on to say is low in this configuration. \$\endgroup\$ – Jack Creasey May 6 at 15:24
  • \$\begingroup\$ Hi Peter, thanks a bunch for the help. I've got a lot to learn, looks like there's a lot of concept I really don't understand at all...I'll try to go online and make sense of everything you're saying. Also, I edited my original question with updates about the specifications of the battery pack. If there's anything else you can help me with regarding that, I would really appreciate it. Thanks again! \$\endgroup\$ – Alvin Li May 6 at 18:29

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