I am testing my FPGA board (spartan 6) by taking external trigger signal (square wave 5V 50%.)

The rising edge of the signal is shown below with overshoot and undershoot, so my FPGA can not detect the trigger.

Any advice about method or technique to reduce theis overshoot and undershoot? I would like to do it in hardware by adding some IC or filter.

enter image description here

  • 6
    \$\begingroup\$ Are you probing correctly, with the little springy attachment? \$\endgroup\$ – Jeroen3 May 6 at 8:07
  • \$\begingroup\$ @Jeroen3 I used 50 Ohm coaxial cable attached directly from the source to my fpga board. \$\endgroup\$ – nam thanh May 6 at 8:16
  • \$\begingroup\$ You got other problems than over and undershoot if you signal starts deviating again after it settles. \$\endgroup\$ – DonFusili May 6 at 8:19
  • \$\begingroup\$ @DonFusili Sorry, I am alittle confused, can you explain more detail? \$\endgroup\$ – nam thanh May 6 at 8:23
  • 3
    \$\begingroup\$ Your over/undershoot settles after the first 400-ish ns, after which you get new, larger oscillations. This isn't how regular over/undershoot behaves. So you likely are attributing symptoms to over/undershoot that are a different problem. \$\endgroup\$ – DonFusili May 6 at 8:27

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