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Given some abstract architecture of CPU:2-BUS architecture

Note that this CPU has 2-BUS. Why do we need the R_out and R_in? If I use Gra/Grb/Grc then obviousely I will need R_out. The Same for R_in when I use Sra/Srb/Src?

Sorry if the question is not qualified enough. Thanks in advenced.

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  • \$\begingroup\$ @JDoe Did that answer the question? \$\endgroup\$ – laptop2d May 17 at 14:57
  • \$\begingroup\$ @laptop2d I commented in your answer. \$\endgroup\$ – J. Doe May 20 at 13:15
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It looks like Rin and Rout are register selection control lines to select which register is available to the bus.

enter image description here Source Side4: https://www.slideserve.com/eben/chapter-4-processor-design

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  • \$\begingroup\$ Thanks, but it didn't fully answered my question because this picture is match to 1-BUS arch, but if we have 2-BUS arch, then we can make R_out and R_in unnecessary, since if we "choose" Gra then obviously we want to output the signal, and if we "choose" Sra, then obviously we want to input the signal, which is make R_in and R_out unnecessaty, isn't it? \$\endgroup\$ – J. Doe May 20 at 13:14
  • \$\begingroup\$ You still need register select lines to access the registers, otherwise you couldn't tell the data which register to go from each bus. In slide 48 it shows an add instruction which still uses the Rout and Rin lines to select registers, and two register select decoders will be needed. \$\endgroup\$ – laptop2d May 20 at 16:17

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