Hysterisis - How do you choose a good value for R3?

simulate this circuit – Schematic created using CircuitLab

Above is the basic schematic for a comparator with hysteresis. Determining the values of R1 and R2 is fairly straight forward. They essentially boil down to ratios of R3 and you can just plug the values into the relevant formula.

So, the choice of R3 seems to be the most important design decision. But I haven't really been able to find much information on how to work out what a good value for R3 is.

I've been having some problems with designs that look good on paper but don't seem to function correctly in reality...

Picking a high value seems good, since it would reduce overall current usage. But how high can you go?

What characteristics of the comparator are important? Does the value of VRef have any impact (many comparators have a built in VRef, so you may not have a choice here)?

Essentially my question is: What factors do you need to consider when choosing the value of R3 to design an efficient and stable hysteresis circuit?

• You should connect R1 to R2 and R3 as well. – Huisman May 8 '19 at 6:26
• Thanks, I didn't notice it had put a loop instead of a join :p – hekete May 8 '19 at 6:34
• It boils down to precisely what your circuit is intended to do and how much hysteresis you want. You haven't stated that. – Andy aka May 8 '19 at 8:57
• I was looking for general guidelines/rules that would be applicable to any design. Do the rules change a lot between designs? Like does having a few hundred mV of hysteresis change things up a lot from just having a few tens of mV? I can see that switching frequency would have a big impact, but is that the main variable? – hekete May 8 '19 at 11:48

I would not say it is very important, but it's a degree of freedom.

Looking out from the comparator input you see a Thevenin equivalent source resistance of R1||R2||R3. So there will be an error due to bias current of Ib *(R1||R2||R3). Bias current varies with temperature etc. Even if the comparator is a CMOS type you probably don't want to go too high lest the input be noise sensitive or sensitive to PCB leakage or less stable. It's also affected by the precision you wish to achieve.

If your input is actually applied to R1 rather than the inverting input of the comparator, then the source impedance of your input signal is added to R1, and some changing current is injected into the input which may affect it.

If your comparator must operate very quickly you will want to use relatively low value resistors because stray capacitance and input capacitance of the comparator will affect the performance. If you're dealing in in nanoseconds you probably want R1||R2||R3 to be a few K at most.

Another consideration is that often R3 will turn out to be much higher in value than R1 or R2, especially if you are only adding a taste of hysteresis so you don't want R3 to be too high or it may become more expensive or harder to buy.

On the low side you are consuming power from the supply due to the resistors which may be a consideration and the output must not be loaded too much by R3 + (R1||R2).

So a reasonable range for R3 might turn out to be 10K to 10M (no doubt with exceptions in extreme situations), depending on the hysteresis required etc. You can use this degree of freedom to optimize power consumption (higher end), accuracy (pick precise ratios using standard series resistors and minimize bias current and leakage effects) etc.

Sometimes it's better to pick a value for R3 (say 1M or 100K) and work with the other values. Whatever you come up with, once you have design resistance values, you can scale the three values to get closer to standard value, values you happen to stock etc.

• That makes a lot of sense. If I wanted to design for minimum power consumption with a low switching frequency, what would determine the upper limit for R3? – hekete May 10 '19 at 5:05
• Considerations like noise, bias current and leakage, and input capacitance affecting how fast the positive feedback is effective. Some of that can be mitigated, for example by a small capacitor across R3. It’s hard to be more specific without knowing roughly what you are thinking of. – Spehro Pefhany May 10 '19 at 9:48
• MAXIM Example about half-way down uses a MAX9117. Not complete circuit, so don't know what noise or capacitance is. But they choose R3 by the current at trip point. The bias current is 2nA max (typical is 0.15nA) for that chip, leakage isn't specified because it's push-pull and they choose 0.2uA for R3 current. It seems to me they could have safely chosen a much lower current? – hekete May 11 '19 at 4:53
• Note the comment, reflecting what I said above “Unfortunately this method also slows the hysteresis response time”. This Is an unusual part in several respects- the internal hysteresis makes is even possible to use such high values. Frankly I don’t see enough information to calculate whether the part will be suitable even if you supplied all the information on your application. The input capacitance might be a few pF but sometimes analog CMOS inputs use structures that have much more capacitance. You can calculate the DC effects easily 2nA and 100M is 200mV error, for example. – Spehro Pefhany May 11 '19 at 8:23
• In the example, the error due to leakage is negligible relative to offset voltage, but your application may tolerate more error. You can get an idea of the typical AC response by breadboarding or simulation (SPICE). Watch out for non-clean switching around the transitions with relatively noisy inputs. – Spehro Pefhany May 11 '19 at 8:29

All resistor values contribute to the hysteresis, not just only R3.
Next, Vref sounds like a fixed voltage, while it should be the test voltage, which is variable.

The hysteresis level can be calculated as follows:

If the comparator output is rail-to-rail and the output is high, the output is Vcc.
In that case, the voltage at the positive input terminal of the comparator is:

$$V_{cc} \cdot \frac {R2} { (R1 || R3) + R2 } = V_{cc} \cdot \frac {R2} { \frac{R1 \cdot R3}{(R1 + R3)} + R2 } = V_{cc} \cdot \frac {R1 R2+R2 R3} { R1 R3 + R1 R2 + R2 R3 }$$

If the comparator output is rail-to-rail and the output is low, the output is OV.
In that case, the voltage at the positive input terminal of the comparator is:

$$V_{cc} \cdot \frac {R2|| R3} { R1 + (R2 || R3) } = V_{cc} \cdot \frac { \frac{R2 \cdot R3}{(R2 + R3)} } { R1+ \frac{R2 \cdot R3}{(R2 + R3)} } = V_{cc} \cdot \frac { R2R3 } { R1R2 + R1R3 + R2R3}$$

The differences between these voltages is the hysteresis band.

The hysteresis band is given by: $$V_{cc} \cdot \frac { R1R2 } { R1R2 + R1R3 + R2R3}$$

The hysteresis band can also be written as: $$V_{cc} \cdot \frac { \alpha \beta R3 \beta R3 } { \alpha \beta R3 \beta R3 + \alpha \beta R3 R3 + \beta R3 R3} = V_{cc} \cdot \frac { \alpha \beta } { \alpha \beta + \alpha + 1}$$
where $$\ R1 = \alpha R2 \$$ and $$\ R2 = \beta R3 \$$.

Now, it is written such that R2 only depends on R3 and R1 depends on R2 and so also on R3.

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simulate this circuit – Schematic created using CircuitLab

• While all the values contribute, you can simplify the equations down to be ratios of R3. R1 depends only on R3 while R2 depends on R1 and R3. VRef is often a fixed reference voltage in many comparators. – hekete May 8 '19 at 6:41
• Vcc as well as Vref are normally used to be fixed voltages. If Vref is fixed in your case, Vcc isn't? – Huisman May 8 '19 at 6:57
• @hekete You can simplify the equations down to be ratios of R1 or ratios of R2 as well. I don't see the point of simplying the resistors of ratios of the other. Could you please explain? Moreover, you can also say: R2 only depends on R3 while R1 depends on R2 and R3. – Huisman May 8 '19 at 7:08
• Sure, I guess you could use any of them? What I'm trying to say is that for a given hysteresis band only one R value needs to be selected as the others will be ratios of that R. I've always seen it done as: Select hysteresis band then choose a value for R3. R1 and R2 are then derived from that..? – hekete May 8 '19 at 12:05
• And yeah in my example I'm assuming Vcc is variable. – hekete May 8 '19 at 12:09