6
\$\begingroup\$

I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected. Is there a digital circuit from logic gates, flip flop that can do that? I am thinking about flip flop but the problem is that it detects with every rising edge not just the first rising edge.

enter image description here

\$\endgroup\$
  • 3
    \$\begingroup\$ And when does out go low? \$\endgroup\$ – Tyler May 10 at 0:31
  • 1
    \$\begingroup\$ You need a combination of Flip-Flops and logic gates. \$\endgroup\$ – Mattman944 May 10 at 0:34
  • \$\begingroup\$ Are you trying to detect if y and z go high before the second rising edge on x? Or, if they went high after the second rising edge, would that also result in the output going high? \$\endgroup\$ – Annie May 10 at 0:42
  • \$\begingroup\$ @Tyler it will remain high from that time \$\endgroup\$ – anhnha May 10 at 1:54
  • \$\begingroup\$ @Annie: no, the order doesn't matter, only detect the first rising edges of 3 inputs. After the first rising edges of 3 inputs are detected, the output goes high and remains at that value \$\endgroup\$ – anhnha May 10 at 2:05
13
\$\begingroup\$

You could use the circuit below with 3 D flip-flops and one 3-input AND gate. You would also need to use the reset input of the flip-flops to bring the output back to zero (not indicated in the schematic).

schematic

simulate this circuit – Schematic created using CircuitLab

\$\endgroup\$
  • \$\begingroup\$ You can move the FF after the 3-input AND to save 2 FFs. \$\endgroup\$ – Paebbels May 13 at 1:51
  • \$\begingroup\$ @Paebbels - To use your proposal we need the two first (sequentially speaking) inputs to be high at the rising edge of the last input, what is not the case in the example given. Notice that X is already low when Y goes high. \$\endgroup\$ – joribama May 13 at 4:49
  • \$\begingroup\$ I accept you arguments, but the drawing is way to inaccurate to say X is definitely down :). \$\endgroup\$ – Paebbels May 14 at 23:22
6
\$\begingroup\$

Put each input on the set of an SR latch, and AND all the outputs together.

\$\endgroup\$
2
\$\begingroup\$

As defined 3 rising edges are asynchronous thus reset 3 latches and NOR input= output

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.