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On many of my designs, there are ICs which have mode selection or similar inputs that are permanently pulled up or down using resistors.

If I replaced all these with simple hard pullups or pulldowns I would probably save 10 placements per board on average, which is not nothing. Is this a bad idea? And if so why?

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    \$\begingroup\$ Include a schematic of what you mean, what's a "hard pullup" do you mean a direct connection (no series resistor) to the supply? Include a link to an example of an IC for which you want to do this. Someone put the resistors in the schematic, ask that person why they did that. \$\endgroup\$ – Bimpelrekkie May 10 at 20:49
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    \$\begingroup\$ On rev 0 of any board I tend to strap any configuration or spare input pins high or low using resistors (sometimes zero-ohm), because it may provide a quick fix in an "oh @#$%" moment. With zero-ohms you can remove the resistor, or remove the resistor and use the pad for a wire, etc. Once I'm sure of the design, if production volumes are high enough that it matters I'll make a pass through and just strap things high or low with copper. \$\endgroup\$ – TimWescott May 10 at 21:28
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    \$\begingroup\$ If you know that the pin can never be programmed as an output by accident or code error then you can always connect it to a power rail as that is a design aspect of a input pin. This is why microcontrollers in general (special cases exist) will wake up with all pins in input mode and the code must set those others to output that are not shorted to a power rail. \$\endgroup\$ – KalleMP May 11 at 9:17
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    \$\begingroup\$ Read the datasheet. If it is ambiguous, contact the MFG. They normally answer questions like this. \$\endgroup\$ – mkeith May 17 at 1:33
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I asked a similar question on the EEVBlog forum some time ago. I had this idea in my head that any signal I needed permanently low I would tie hard to ground, and any signal that I needed permanently high I would tie up via a resistor.

I didn't really know from where or why I used this scheme, so I asked about it. I think it may have been something that I picked up somewhere that was more applicable in the TTL days.

EEVBlog - Pull-up resistors - technically necessary vs preference?

The general consensus seemed to be, and as Huisman suggests, unless you need to be able to pull the signal in the opposite direction, you can simply pull it hard up/down.

It is worth noting that my question was in relation to CMOS-based devices - it may still be applicable/necessary if you are playing with TTL families.

More technical reasons revolved around noise immunity, especially if your pull-up resistor values were of a high value.

As I am writing this, other reasons I can think of for wanting to use pull-up/pull-down resistors might include troubleshooting abilities, "hidden features", or debug/service mode selection for example.

Since that thread I am no longer using pull-up resistors unless I need them functionally.

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    \$\begingroup\$ Yes, it was a requirement for TTL Hi to prevent secondary breakdown current on overvoltage transients to supply. But not for CMOS. Although my TE's would add them for testability since it serves no function, I said fault detect is adequate with inputs used. \$\endgroup\$ – Sunnyskyguy EE75 May 10 at 21:16
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The idea of pull-up / pull-down a signal is that the signal is being pulled high or pulled down low most of the time, but can sometimes be pulled down or pulled high respectively.

In the case you want to pull down a signal incidentally that is pulled up most of the time, you want to use a pull-up resistor to prevent huge current drawn from the supply.

So, if your circuit really uses pull-up or pull-down resistors as described above, don't remove them. (For example, when a pin is open collector.)
If in your circuit a signal needs to high or low forever (when the supply is present) and no other component can change the state of this signal, then you can hard-wire it. Those signal are not called pulled-up, but high, and, respectively not called pulled-down, but low.

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The answer will be in the datasheet. If the logic input operating voltage specification includes VCC or V+ then connecting directly to positive supply is OK.

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Let’s consider a pull-up resistor. The job of a pull-up resistor is to pull a particular pin to the HIGH state. However, the pin won't always be in the HIGH state because some circuitry can pull it down to ground. Consider I²C lines. They are pulled up via pull-up resistors and the microcontroller pulls them down as and when needed. Had these lines been permanently pulled up AKA "hard pulled up", I²C communication wouldn't have happened. The SDA line will see a permanent HIGH state.

Your scenario

In your case, if there's a resistor between the pin and GND/Vcc, don't remove it. If the datasheet says to put a resistor, do it. However if you want to delve deeper and understand the functionality of the pull-up /pull-down, look for the IC block diagram in the datasheet. Sometimes you may even find a circuit diagram of the internal blocks. Try to understand the function of the particular resistor (if you find it difficult to understand the circuit, you can post the schematic here). Like Huisman said, if a pin is permanently pulled up or pulled down, the pin's state isn't called pulled up or pulled down. Instead it is HIGH or LOW.

Some info about pull-up /pull down

Pull-up (and pull-down) resistors are generally high, about 10 kΩ generally and they keep the pin in a defined state - HIGH (or LOW) . When an external circuit pulls down a pulled up pin, it provides a path of lower resistance to the ground for that pin. Hence, the pull-up resistor value depends on the resistance offered by the external circuitry to the pin, to GND. The pull-up value must be significantly greater than the resistance of pull-down path. Some circuit designs with ASICs may use even a higher value of pull-up or pull-down.

So to summarise the answer, a pull-up or pull-down resistor is used when the state of the pin has to be changed via some circuitry. If the pin state won't be changed anytime in future, you can hardwire it to either VCC or GND.

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I am surprised to see that nobody mentioned DFT here. In some case, using pull up/down resistor leaves room for a test fixture to inject a signal and put the input in a different state for the time of the test. Let's use the simple example of a Chip Enable signal that you want to be always at "enable".

While performing an ICT test, you may want to disable the Chip Enable pin to put the output of the IC in High impedance mode. Doing so, allows the test fixture to inject arbitrary signal at the output of the disabled IC, which would otherwise be impossible if the CE pin would be "hard driven".

This is an additional use-case. Other answers in this threads are valids.

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  • \$\begingroup\$ I did hint at this kind of thing in my reply. \$\endgroup\$ – Tom S May 20 at 20:31
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It really depends on why you are pulling it up. Sometimes unused functions may be toggled by the built-in boot logic of a chip during startup. If a processor can boot from multiple sources, it may have to auto-discover which source is attached during power on. That can lead to some lines being toggled prior to code execution (prior to your code executing). So if the datasheet says "pull up if not used," then you would want to double-check with the manufacturer before tying it high. Or, if possible, maybe you can monitor the behavior of the line during start-up to make sure it is not driven low ever.

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Hmmm. Have not seen it mentioned yet, but a reason, especially for pins tied high, is to use a resistor for reduced power consumption. Consult the datasheet for the device in question.

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    \$\begingroup\$ Can you please elaborate on how or in what cases power would be saved in some specific scenario? \$\endgroup\$ – mkeith May 17 at 1:52
  • \$\begingroup\$ Going strictly on memory, @mkeith, an example was a T1/E1 transceiver, where configuration was determined by a combination of pins being tied low or pulled up. IIRC the datasheet made it clear to use discrete resistors for the pull-ups to reduce power consumption. Perhaps these inputs were BJT transistors as compared to FET inputs; i.e. current is actually drawn. I have seen this practice consistently from our senior engineers' designs so I have been assuming the reasoning was still valid. \$\endgroup\$ – c-squared May 20 at 14:05

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