Picture to Keep the Terminology Clear
I am in the plan of using ETH for inter processor communication
I need few ETH lanes to be shared between boards, i wish to avoid ETH PHY and magnetics as the interface is between two processors only.
I have few RGMII outputs coming from a TI-TDA2x which needs to be taken to a back-plane,from back plane i shall take it another board having TI-TDA2x
i want to know what is the maximum safe distance between MAC to PHY to be maintained ?
My Speed Requirement : 1 Gbps