# How to reduce thermal resistor noise in filter circuit?

I'm taking some measurements from a bio-sensor (using an INA) that operates on the a few to $$\100\ \mu V\$$ scale. Because of 50/60 Hz EMI, I plan to apply a notch filter (NF) of the Twin-T or the Fliege type. However, both these filters are quite sensitive on the component values, so to obtain the Q I need, I'm to be obliged to use (at least) 1-2 resistors in the $$\1-4 \ M\Omega\$$ range.

The thermal noise for these, as given by:$$\V_n = \sqrt{4 k_B T\ R\ \Delta f}\$$, then become of the order of >1 μV, which is already at the lower range of my measurements.

• Is there a way to reduce/cancel thermal noise without reducing R or T?
• Does the noise depend on the type or material of the resistors used?
• How does the thermal noise spectrum look at frequencies: 0-300 Hz?

UPDATE: 2019-05-15

An very interesting and related question is actually about how to increase this noise. See:

An interesting solution was proposing to just leave out the filter altogether and just use digital signal processing to do the filtering. However, I feel this goes against my philosophy of always reducing noise as close to the source as possible. In addition it would created bloated raw signal data, which would take more space to save, if needed.

UPDATE-2:

• I'm not using a DRL. Because it would look something like this:

Photo credit: Wikipedia

• standard question: any reason why you want to build that filter in the analog world, instead of doing the filtering on the digitized signal, which is far easier to do exactly? (there might be good reasons, but you mention none!) May 11, 2019 at 11:16
• By the way, these are three separate questions, and should ideally asked in three separate question posts! However, your last question is easy to answer: in that tiny bandwidth, thermal noise PSD is definitely flat, so that your $V_n$ formula works (you'll notice that this formula assumes flatness). May 11, 2019 at 11:17
• Good question. Although I am not yet certain of the answer, I think because I want to use a very limited μC to do the ADC and subsequent analysis. Therefore I'm trying minimize any subsequent processing on the μC. In addition there are a few other filter and amplifying stages, that would end up amplify the noise, before even reaching the ADC. May 11, 2019 at 11:20
• Well, I'm usually the one saying that it's a good idea to explain what the thing is that you need to achieve (in this case: what are you sampling how often, and why is that 50/60 Hz interference a problem). I'm sure you can build a good notch with large analog components and at significant cost, but in the end someone would write an answer that's "here's how you do it in analog, but as a signal processing person, I'd say: do it in digital", so I was trying to avoid that detour for you :) May 11, 2019 at 12:31
• hm, depends on what you do with your signal afterwards! There's plenty of things that simply don't care about a narrowband interferer like that. May 11, 2019 at 12:36

While it's certainly possible to build an analog notch filter for 50 Hz, and one for 60Hz:

you have to realize that all the involved components in the filter branch affect the actual notch frequency (calculator: here).

While large-valued resistors might be easy to get with a 1% (or even less!) accuracy, most capacitors suffer from a tolerance upwards of 10%. That means that after building the circuit, you'll be standing there, calibrating your circuit (hint: build the 10 MΩ - 10 MΩ divider using a potentiometer, so that you get something to adjust; same for the 5 MΩ.); every single circuit. Every now and then, because of thermal properties and potentially aging.

Then you do that for both your notches.

I'd say that's six to eight passive components per notch filter (so, twelve to 16, not counting decoupling the opamp, which you'd need to buffer the output) to worry about.

Compare the situation where you actually just sample your signal as per Nyquist's theorem (i.e. if you need frequency content up to 300 Hz, then sample at > 600 Hz and use a low-pass filter to cut off frequencies above $$\\frac{f_\text{sample}}2\$$.

So, assuming a very benign sampling rate of 2 kS/s (your microcontroller can most definitely do that without even remotely breaking a sweat), this would be the system description:

1. You need an analog anti-aliasing filter, no matter whether you do your nothing in digital or analog:
Passband 0-300 Hz, stopband 1000 Hz+. That can be done with a single Sallen-Key filter followed by an RC and a buffer. I.e., for all your analog filtering needs, you need one dual op-amp. See design below:

Notice how the blue area is the range of abberations from the ideal design using 20% capacitor tolerance.
Design was done using Analog Device's analog filter design tool, design export here
2. A digital IIR notch filter executed in your MCU. I went ahead and did a quick example calculation of a high-Q notch filter; a Q of 30 will be hard to achieve with analog components, because none of them are lossless.

Notice that this thing needs 6 multiplications and additions per input sample. At a sampling rate of 2 kS/s, that means 12000 multiplications per second. Unless your microcontroller is actually an abacus, that's not going to take any significant amount of time. Even an 8 bit microcontroller running at 8 MHz that needs 28 cycles (that's very slow! But it's roughly the number of unoptimized AVR code for int16 multiplications) for a multiplication will not take more than 42 ms on these computations per second – so, that's a worst-case computational load of ~5% CPU time! An ARM cortex-M, like often found in Bluetooth chips, will basically be bored all the time; these things often come with a single-cycle 32 bit multiplier. Not to mention that the bigger ones (e.g. Cortex-M4F) even come with multiply-accumulate instructions especially designed for filtering applications.
3. Detect whether you need the 50 or the 60 Hz notch based on an estimate (simply try both at powerup, and see which one cancels more power from the signal – super easy!).

So, even if you have to buy a second microcontroller only to do the filtering digitally, for some strange reason that I don't see, doing the filtering in digital domain is advantageous in both quality and ease, not to mention that if you're doing this with cost restrictions / production in mind, tuning an analog filter to do the notching halfway reliably is no option at all.

• Although, also this answer doesn't directly address my question, I find the idea of just skipping the NF altogether, rather intriguing. Only tests could confirm if this will work in practice since the final stage before (ADC) is a gain stage. Also, the Twin-T you got is using R's one order of magnitude larger than what I already was simulating, so I guess the noise would be huge there, >5 μV May 12, 2019 at 17:48
• the T-notch is just an example circuit (hence the link to the original page); the high values are used to avoid loading the source. If you have a buffer in before that, you can use 1/1000 of those resistor values, of course. However, you'll have a very hard time designing a circuit where your parasitic capacitances are reliably smaller than a few picofarad – so again, the analog way is really hard to do right here. May 12, 2019 at 17:51
1. The channel impedance is dominated by the electrode impedance shunted by the INA R. Typically EEG electrodes must be very low to reduce motion artifact noise and is about 50k / 50nF, thus the R >> 100k is insignificant.

$$e^2 = 4k_B\ T\ R\ Δf = 4 * 1.38x10^{-23} * 300K * 50kΩ * 300Hz \approx 0\ nV$$

where: k is Boltzmann’s constant 1.38*10^{–23} [Joule/K], T is temperature in Kelvin [K], R [Ω], Δf is frequency [Hz], e is Voltage ($$\V_{rms}\$$).

1. There is another 50 year old solution to this. It was called Active Guarding, while others who also thought they invented it later, called it Active Electrode.

It guards the signal by driving the shielded cable to cancel the stray CM E-field rather than connected to CM ground.

Ref.

The 50 Hz noise was completely eliminated by this method.

In medicine they call it Right Leg Guard, RLG, but nowadays in EE we most often refer to this as Right Leg Drive or Driven Right Leg (DRL).

• Although I appreciate your attempt to answer more generally, it really doesn't address my question at all. In addition, I'm not using a Right Leg Drive. May 12, 2019 at 17:39
• You might want to reconsider your choices to need a notch filter instead of an active shield or electrode May 12, 2019 at 18:33
• I'm not sure how to interpret that statement. Should I consider dropping filter and adding active shield or the opposite? (For practical reasons, I cannot use a DRL, since there are no legs involved in our circuit and signal source and while trying to use as compact a design as possible.) If you really suggest to use a DRL, how close to sensor can the DRL be and still be effective? May 13, 2019 at 15:20
• Yes that's what I'm saying. Use active shields or a dummy active electrode. DRL is just a standard. it could be a bald spot on your head. May 13, 2019 at 15:23

I don't have the reputation to comment, but I wanted to add some information on the DRL. I would recommend using one. In the EEG world you always have one and it helps immensely with common mode rejection. Additionally, despite the name, it does not need to go on the right leg. For EEG the DRL electrode goes on the cap with all the other electrodes, meaning it is right next to some of them (but farther from others). Its placement is not particularly important, which may be why in EEG it's more commonly called the "ground" electrode instead of DRL.