I've read several so-called explanations on the web of how a NOT gate works, but they all explain WHAT it does, not HOW it actually works. I know what it does.
Consider this schematic of a NOT gate:
When A is low (0), switch T1 is open, and OUT is high (1). That I understand: Current passes from the positive voltage (+Vcc) through R2 to OUT. Is this correct?
What I don't understand is what happens when A is high (1) and T1 is closed. OUT is supposed to be low (0) in this case, but I don't see what's actually happening in terms of current. There is a path through T1 from +Vcc to ground, but how does that result in OUT being low (0)?
Can someone who understands this please explain in terms of voltages and current flow exactly what's happening?