I want to make a clock generator for Altera EPM240T100C5N using the CPLD itself as a Pierce oscillator. This CPLD has Schmitt trigger inputs so I guess this should be possible. What I`m not sure about is the reliability of this approach. Can I use a CPLD inverter to build an oscillator? If yes, how much influence will the supplied voltage have on the resulting jitter? Will there be much difference between 2.5V and 1.8V at 48 MHz?

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  • \$\begingroup\$ not possible................ You can't design it, if you don't know how it works ( which is easy to search) Hysteresis is used for RC relaxation Oscillators only \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 12 at 15:15
  • \$\begingroup\$ I'm curious. Why not just use a crystal to provide a clock for the CPLD? You'd probably save a lot of space on your PCA. \$\endgroup\$ – KingDuken May 12 at 15:20
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    \$\begingroup\$ If you look at similar oscillators, you'll generally see they specify "unbuffered" inverters (such as the 74HCU04 - an unbuffered version of the 74HC04 - sold for precisely such purposes. If your CPLD doesn't advertise a pair of dedicated pins with an unbuffered inverter between them, it really isn't worth trying this approach. \$\endgroup\$ – Brian Drummond May 12 at 15:27
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    \$\begingroup\$ @KingDuken "Why not just use a crystal to provide a clock..." because a crystal is a passive component, and needs a correct amplifier circuit to make an oscillator. Perhaps you're thinking of a crystal oscillator in a can? \$\endgroup\$ – TimWescott May 12 at 16:17
  • \$\begingroup\$ @TimWescott I think KingDuken meant a passive crystal going to XTAL(TOSC) pins, I'm not a CPLD guru, but so far the CPLD's I've worked with has those pins. \$\endgroup\$ – Harry Svensson May 12 at 18:06

I do not recommend this approach. You may get some circuit to oscillate under some conditions but you may very well have problems with jitter, unreliable startup and off frequency operation.

You should instead use a ready made crystal oscillator part. These days these are very small parts and can be placed near to the FPGA. The oscillator application only requires a bypass capacitor across its power pins and for some applications a small value series termination resistor at the oscillator may be required.


This CPLD has Schmitt trigger inputs so I guess this should be possible.

Actually, if it has Schmitt trigger inputs it makes it impossible. A Schmitt trigger would just about guarantee that the oscillator would start up in a mode that excites the RC components of the circuits and bypasses the crystal altogether.


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