To determine these resistances, you could advantageously use the extra-element theorem or EET forged by Dr. Middlebrook. This theorem is part of the fast analytical circuits techniques or FACTs. The principle is the following: in a complicated circuit, identify the element which makes the analysis difficult. Then derive the transfer function you need (an impedance is a transfer function) without this element in place (or replaced by a short circuit) then calculate a multiplying coefficient which once in place will give the complete expression in a clear and ordered manner.
In your circuit, it looks like the 2-\$\Omega\$ resistor (labeled \$R_{EE}\$) is causing troubles. We have the choice to temporarily set it to an infinite value (remove it from the circuit) or set it to zero (replace by a short circuit). We choose to remove it. Now, determine the resistance seen from terminals a and a' with \$R_{EE}\$ removed.
You determine the resistance offered by a port by applying a test current generator \$I_T\$ which is going to develop a voltage \$V_T\$ across its terminals. You have to determine \$V_T\$ and the ratio of \$V_T\$ over \$I_T\$ is the resistance you want. \$I_T\$ is called the excitation or stimulus while \$V_T\$ is the response. In this first step, without a single line of algebra, you can see that this reference value is \$R_{ref}=R_5+R_1+R_2||(R_3+R_4)\$. This is called inspection: you inspect the circuit by "looking" into the considered element's terminals.
Now, set the excitation \$I_T\$ to zero (remove the source) and "look" into \$R_{EE}\$ connecting terminals to express the resistance \$R_d\$ we want. This is shown in the below sketches. Similarly, run the exercise when the voltage \$V_T\$ is nulled (replace the current source by a short circuit for this degenerate case). Unfortunately, when doing so, you find that \$R_2\$ is now causing problems. Not a big deal and you go through an intermediate EET now considering \$R_2\$ as the extra element. This is shown in the below sketches:
All these steps are done by inspecting the network, no KVL or KCL here. Finally, and that is the cool thing, you can simulate/test all these steps and make sure you progress through the process without making an interpretation mistake. SPICE is extremely helpful by computing dc operating points as shown below. If you bias the port with a 1-A current source, the voltage across the terminals is representative of the resistance you want.
If you capture the expressions in a Mathcad sheet, the result happens at the end by combining the two EETs. And if you made a mistake, you just solve the guilty part, no need to restart from scratch.