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Some time back I found a circuit on the Internet that professed to build a logical OR gate with two transistors; accompanying it was a circuit that professed to build a logical AND gate, also with just two transistors.

But then I got to thinking that one transistor by itself is practically a logical AND gate, isn't it? If the voltage at an NPN transistor's base is high, then there will be no resistance between the collector and the emitter, so the voltage at the emitter will be high if the collector is high, and low if the collector is low. And if the voltage at the base is low, the voltage at the emitter will be low regardless of the voltage at the collector.

Similarly, if the voltage at a PNP transistor's base is low, then the voltage at the emitter will be roughly the voltage at the collector, while if the voltage at the base is high, then the voltage at the emitter will be low regardless of the voltage at the collector.

That being the case, could I build a multiplexer with just four transistors via the following circuit? The inputs are bits Co (for control), Il, and Ih, and the output is bit Ou. The semantics are that Ou will take the value of Il if Co is low, and the value of Ih if Co is high. Vcc is high voltage and Gnd is ground.

schematic

simulate this circuit – Schematic created using CircuitLab

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There are a lot of "tricks" to get a single stage non-inverting logic gate to work, but a lot of times they will suffer from some input or output characteristic that is undesirable. In this circuit's case, I can identify the following issues you may see (in no particular order, not exhaustive).

  • When Ih = Co = '1', the output voltage will be two Vbe drops lower than Co
  • When Il = '1', Co = '0', the output voltage will be one Vbe drop and Vsat lower than Il
  • Output voltage is not restorative, meaning you couldn't chain circuits using this technique one after the other forever
  • Output voltages differ for various conditions of Ou = 1
  • When Il = '1', Co = '0', Il will be shorted to Co through the base-emitter junction of Q2
  • When Ih = '0', Co = '1', Ih will be shorted to Co through the base-collector junction of Q1
  • Input impedance depends on states of other inputs (and changes dramatically)
  • Reliable operation may require pull-down resistors on the base of Q3 and Q4
  • Depending on voltage levels, reverse Vbe may be exceeded (typically -5V)

So it can probably be made to work, but there's a lot of issues with using it as a normal logic gate. You would likely need to test circuit behavior in every state of this gate, monitoring voltages and currents. If I grabbed a standard logic gate (TTL, CMOS, etc...), then I would generally expect none of these issues to really cause problems.

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  • \$\begingroup\$ actualy Il = '1', Co = '0' Q2 burns up. Ch=1 Ih=0 Q1 burns up. \$\endgroup\$ – Jasen May 16 at 3:38
  • \$\begingroup\$ @Jasen That's definitely a possible consequence of shorting two inputs. Whether or not those devices survive depend on the output characteristics driving those inputs. For example, a switch with a resistor pull-up on each input would survive. \$\endgroup\$ – W5VO May 16 at 7:29
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That circuit won't work. when CO is high out will always be high, there are other problems, but that was most obvious.

maybe try this:

schematic

simulate this circuit – Schematic created using CircuitLab

Q1 ans Q2 select and invert the input signal Q3 provides pull-up/pull down to oppose Q1 or Q2 as apropriate. Q4 inverts and amplifies the selected and inverted signal

perhaps like this:

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In cmos you certainly could, look up "pass gate multiplexer". It's simpler than the circuit you show, I need for a resistor or anything else (though you need an inverted version of the control signal). They are used in critical paths on processors but you have to be careful not to enable both branches at the same time.

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  • \$\begingroup\$ I did a Google search on "pass gate multiplexer" and came up with a number of schematics on a page with a wierd, long URL that I won't include. But one of the schematics only had two transistors. I clicked on it and my browser went to "iitg.ac.in/cseweb/vlab/vlsi/Multiplexer_theory.html"; you can scroll down to the place where it says in red letters, "Design using pass-transistor logic". Is it really possible, as this schematic seems to imply, to implement a multiplexer with just two transistors? \$\endgroup\$ – KevinSim Sep 19 at 18:44
  • \$\begingroup\$ Yes that is a mux. An nmos transistor is a switch that closes when the control voltage is high. But it's not as good electrically as a cmos pass gate, which can pass high and low equally well. I forget the details. I know that in the early 2000s cmos cameras used nmos switches as analog muxes. But density mattered most there because each transistor was a dead spot optically. \$\endgroup\$ – Matt Sep 19 at 19:41

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